The Effects on Metal Oxide Semiconductor Field Effect Transistor Properties of Nitrogen Implantation into p^+ Polysilicon Gate
スポンサーリンク
概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1997-02-15
著者
-
INUISHI Masahide
ULSI Laboratory, Mitsubishi Electric Corporation
-
NISHIMURA Tadashi
ULSI Laboratory, Mitsubishi Electric Corporation
-
INOUE Yasuo
ULSI Development Center, Mitsubishi Electric Corporation
-
YASUOKA Akihiko
ULSI Laboratory, Mitsubishi Electric Corporation
-
MIYOSHI Hirokazu
ULSI Laboratory, Mitsubishi Electric Corporation
-
INUISHI Masahide
Advanced Device Development Dept., Renesas Technology Corp.
-
Inoue Y
National Defense Acad. Yokosuka Jpn
-
KUROI Takashi
ULSI Development Center, Mitsubishi Electric Corporation
-
SHIMIZU Satoshi
ULSI Laboratory, Mitsubishi Electric Corporation
-
SHIRAHATA Masayoshi
ULSI Development Center, Mitsubishi Electric Corporation
-
Yasuoka Akihiko
Ulsi Laboratory Mitsubishi Electric Corporation
-
Miyoshi Hirokazu
Ulsi Laboratory Mitsubishi Electric Corporation
-
Nishimura Tadashi
The Ulsi Development Center Mitsubishi Electric Corporation
-
Nishimura Tadashi
Ulsi Research And Development Center Mitsubishi Electric Corporation
-
Okumura Yoshihiro
Research Institute Of Electronics Shizuoka University
-
OKUMURA Yoshinori
ULSI Laboratory, Mitsubishi Electric Corporation
-
Inoue Y
Ntt Access Network Service Systems Laboratories Ntt Corporation
-
Kuroi T
Ulsi Development Center Mitsubishi Electric Corporation
-
Kuroi Takashi
Ulsi Development Center Mitsubishi Electric Corporation
-
Okumura Y
Minolta Co. Ltd. Osaka Jpn
-
Miyoshi H
Mitsubishi Electric Corp.
-
Miyoshi Hirokazu
徳島大学医学部
-
Shimizu Satoshi
Graduate School Tokyo Institute Of Technology
-
Inuishi Masahide
Advanced Device Development Dept. Renesas Technology Corp.
-
Inuishi Masahide
Ulsi Development Center Mitsubishi Electric Corporation
-
Shirahata M
Ulsi Laboratory Mitsubishi Electric Corporation
-
Shirahata Masayoshi
Ulsi Development Center Mitsubishi Electric Corporation
-
Inoue Yasuo
Ulsi Development Center Mitsubishi Electric Corporation
-
Shimizu Satoshi
Ulsi Laboratory Mitsubishi Electric Corporation
-
Nishimura Tadashi
Ulsi Development Center Mitsubishi Electric Corporation
関連論文
- Channel Characteristics and Performance of MIMO E-SDM Systems in an Indoor Time-Varying Fading Environment
- Partially Depleted SOI Technology with Body-Tied Hybrid Trench Isolation for High-Speed System-On-a-Chip Application(Special Issue on Integrated Systems with New Concepts)
- Direct Measurement of Transient Drain Currents in Partially-Depleted SOI N-Channel MOSFETs Using a Nuclear Microprobe for Highly Reliable Device Designs
- Analyses of the Radiation-Caused Characteristics Change in SOI MOSFETs Using Field Shield Isolation
- Analysis and Optimization of Floating Body Cell Operation for High-Speed SOI-DRAM (Special Issue on Ultra-High-Speed IC and LSI Technology)
- The Influence of the Buried Oxide Defects on the Gate Oxide Reliability and Drain Leakage Currents of the Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors
- Suppression of Parasitic MOSFETs at LOCOS Edge Region in Partially Depleted SOI MOSFETs
- Analysis of the Delay Distributions of 0.5μm SOI LSIs (Special Issue on SOI Devices and Their Process Technologies)
- Features of SOI DRAM's and their Potential for Low-Voltage and/or Giga-Bit Scale DRAM's (Special Issue on ULSI Memory Technology)
- Comparison of Standard and Low-Dose Separation-by-Implanted-Oxygen Substrates for 0.15 μm SOI MOSFET Applications
- High-Speed SOI 1/8 Frequency Divider Using Field-Shield Body-Fixed Structure
- Comparison of Standard and Low-Dose SIMOX Substrates for 0.15μm SOI MOSFET Applications
- Low-Voltage Operation of a High-Resistivity Load SOI SRAM Cell by Reduced Back-Gate-Bias Effect
- Two-Dimensional Analytical Modeling of the Source/Drain Engineering Influemce on Short-Channel Effects in SOI MOSFET's
- Analytical Modeling of Short-Channel Behavior of Accumulation-Mode Transistors on Silicon-on-Insulator Substrate
- Suppression of Self-Heating in Hybrid Trench Isolated SOI MOSFETs with Poly-Si plug and W plug
- Impact of μA-ON-Current Gate-All-Around TFT (GAT) for Static RAM of 16Mb and beyond
- Impact of μ A-ON-Current Gate All-Around TFT (GAT) for 16MSRAM and Beyond
- An Effective Data Transfer Method for IEEE 802.11 Wireless LANs(Wireless Communication Technologies)
- Saturation Phenomenon of Stress-Induced Gate Leakage Current
- Modified Gate Re-Oxidation Technology for High-Performance Embedded Dynamic RAM by Self-Adjusted Gate Bird's Beak
- A Spatial Domain Interference Canceller Using a Multistage Adaptive Array with Precise Timing Estimation (Special Issue on Adaptive Array Antenna Techniques for Advanced Wireless Communications)
- Combining Techniques for Spatial-Domain Path-Diversity Using an Adaptive Array
- Control of Carrier Collection Efficiency in n^+p Diode with Retrograde Well and Epitaxial Layers
- Well Structure by High-Energy Boron Implantation for Soft-Error Reduction in Dynamic Random Access Memories (DRAMs)
- Estimation of Carrier Suppression by High-Energy Boron-Implanted Layer for Soft Error Reduction
- Disk-Shaped Stacked Capacitor Cell for 256 Mb Dynamic Random-Access Memory
- Soft-Error Study of DRAMs with Retrograde Well Structure by New Evaluation Method (Special Issue on Quarter Micron Si Device and Process Technologies)
- WDM Signal Monitoring Utilizing Asynchronous Sampling and Wavelength Selection Based on Thermo-Optic Switch and AWG(Fiber-Optic Transmission)
- W-Polymetal Gate with Low W/Poly-Si Interface Resistance for High-Speed/High-Density Embedded Memory
- High performance 0.2μm Dual Gate Complementary MOS Technologies by Suppression of Transient-Enhanced-Diffusion using Rapid Thermal Annealing
- Scalability of Gate/N^- Overlapped Lightly Doped Drain in Deep-Submicrometer Regime
- Subquarter-micrometer Dual Gate Complementary Metal Oxide Semiconductor Field Effect Transistor with Ultrathin Gate Oxide of 2 nm
- Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS) (Special Section on High Speed and High Density Multi Functional LSI Memories)
- A 90nm-node SOI Technology for RF Applications
- Simulation of Dopant Redistribution During Gate Oxidation Including Transient-Enhanced Diffusion Caused by Implantation Damage
- Clarification of Nitridation Effect on Oxide Formation Methods
- Reliable Multicast Protocol with a Representative Acknowledgment Scheme for Wireless Systems(Special Issue on Mobile Multimedia Communications)
- Circuit-Level Electrothermal Simulation of Electrostatic Discharge in Integrated Circuits (Special lssue on SISPAD'99)
- 2-Dimensional Simulation of FN Current Suppression Including Phonon Assisted Tunneling Model in Silicon Dioxide
- 3-D Topography and Impurity Integrated Process Simulator (3-D MIPS) and Its Applications (Special Issue on TCAD for Semiconductor Industries)
- Realistic Scaling Scenario for Sub-100 nm Embedded SRAM Based on 3-Dimensional Interconnect Simulation(the IEEE International Conference on SISPAD '02)
- Amorphous Silicon Avalanche Photodiode Films Using a Functionally Graded Superlattice Structure
- Amorphous Silicon Avalanche Photodiode Films Using Functionally Graded Superlattice Structure
- A Study on an Antenna Selection Scheme for Space-Time Turbo Code for OFDM Systems(Software Defined Radio Technology and Its Applications)
- A Study on an Antenna Selection Scheme for Space-Time Turbo Code for OFDM Systems
- Proximity Gettering of Heavy Metals by High-Energy Ion Implantation
- New P-MOSFET Hot-Carrier Degradation Model for Bi-Directional Operation
- Space Domain Multistage Interference Canceller for SDMA(Special Issue on Innovative Mobile Communication Technologies at the Dawn of the 21^Century)
- Improvement of Surface Morphology of Epitaxial Silicon Film for Elevated Source/Drain Ultrathin Silicon-on-Insulator Complementary-Metal-Oxide-Semiconductor Devices
- Electron Beam Direct Writing Techniques for the Development of Sub-Quarter-Micron Devices
- Improved Array Architectures of DINOR for 0.5 μm 32 M and 64 Mbit Flash Memories (Special Section on High Speed and High Density Multi Functional LSI Memories)
- Memory Array Architecture and Decoding Scheme for 3 V Only Sector Erasable DINOR Flash Memory (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
- Leakage Mechanism of Local Junctions Forming the Main or Tail Mode of Retention Characteristics for Dynamic Random Access Memories
- Leakage Mechanism of Local Junctions Forming Main or Tail Mode of DRAM Retention Characteristics
- Performance Evaluation of MIMO-UWB Systems Using Measured Propagation Data and Proposal of Timing Control Scheme in LOS Environments
- Performance Evaluation of Multiuser MIMO E-SDM Systems in Time-Varying Fading Environments
- Subblock Processing for Frequency-Domain Turbo Equalization under Fast Fading Environments
- Precise DOA Estimation Using SAGE Algorithm with a Cylindrical Array
- Soft Decision Directed Channel Estimation with Interference Cancellation for a MIMO System Using Iterative Equalization and Decoding
- Performance of MIMO E-SDM Systems Using Channel Prediction in Actual Time-Varying Indoor Fading Environments
- Measurement-Based Performance Evaluation of Coded MIMO-OFDM Spatial Multiplexing with MMSE Spatial Filtering in an Indoor Line-of-Sight Environment
- Studies on an Iterative Frequency Domain Channel Estimation Technique for MIMO-UWB Communications
- Subblock processing in MMSE-FDE under fast fading environments
- Measurement-Based Performance Evaluation of MIMO Spatial Multiplexing in a Multipath-Rich Indoor Environment
- Arrangement of Scattering Points in Jakes' Model for i.i.d. Time-Varying MIMO Fading
- Pseudo Eigenbeam-Space Division Multiplexing (PE-SDM) in Frequency-Selective MIMO Channels
- MIMO E-SDM Transmission Performance in an Actual Indoor Environment
- Channel Extrapolation Techniques for E-SDM System in Time-Varying Fading Environments(Wireless Communication Technologies)
- B-5-76 Channel Prediction for an E-SDM System in Time-Varying Fading Environments
- B-5-24 Compensation of Time-variant Fading Channel Error for E-SDM in a TDD System
- Direction-of-Arrival Estimation of Coherent Signals Using a Cylindrical Array(Antennas and Propagation)
- Applications of Space Division Multiplexing and Those Performance in a MIMO Channel(Recent Progress in Antennas and Propagation Researches : Selected Papers Translated from the IEICE Transactions on Communications (Japanese Edition))
- Channel Estimation and Signal Detection for Space Division Multiplexing in a MIMO-OFDM System(MIMO)(Multi-carrier Signal Processing Techniques for Next Generation Mobile Communications-Part 1)
- Effect of K^+ channel openers on K^+ channel in cultured human dermal papilla cells
- Bipolar Transistor with a Buried Layer Formed by High-Energy Ion Implantation for Subhalf-Micron Bipolar-Complementary Metal Oxide Semiconductor LSIs
- Novel Shallow Trench Isolation Process from Viewpoint of Total Strain Process Design for 45nm Node Devices and Beyond
- Advanced Retrograde Well Technology for 90-nm-Node Embedded Static Random Access Memory Using High-Energy Parallel Beam
- The Effects on Metal Oxide Semiconductor Field Effect Transistor Properties of Nitrogen Implantation into p^+ Polysilicon Gate
- Reliability of Source-to-Drain Non-Uniformly Doped Channel (NUDC)MOSFETs for Sub-Quarter-Micron Region
- Substrate Engineering for Reduction of Alpha-Particle-Induced Charge Collection Efficiency
- Impact of Nitrogen Implantation on Highly Reliable Sub-Quarter-Micron Metal Oxide Field-Effect Transistors (MOSFETs) with Lightly Doped Drain Structure
- The Impact of Nitrogen Implantation into Highty Doped Polysilicon Gates for flighty Reliable and High-Performance Sob-Quarter-Micron Dual-Gate Complementary Metal Oxide Semiconductor
- A 0.4 μm Gate-All-Around TFT (GAT) Using a Dummy Nitride Pattern for High-Density Memories
- 111-MHz 1-Mbit CMOS Synchronous Burst SRAM Using a Clock Activation Control Method (Special Issue on ULSI Memory Technology)
- A 4-Mb SRAM Using a New Hierarchical Bit Line Organization Utilizing a T-Shaped Bit Line for a Small Sized Die (Special Issue on ULSI Memory Technology)
- Stable Solution Method for Viscoelastic Oxidation Including Stress-Dependent Viscosity
- Refractive Index Distribution in Photoresist Thin Film Formed by the Spin Coating Method
- Adhesion Improvement of Photoresist on TiN/Al Multilayer by Ozone Treatment
- Correlation between Negative Hydrogen Ion Production and Work Function of Plasma Grid Surface in a Cesium-Introduced Volume-Production-Type Negative Hydrogen Ion Source
- Separation of Neutral Glycoasparagines According to Their Content of cis Diol Groups
- Silica-Based Planar Lightwave Circuits for WDM Applications(Special Issue on High-Capacity WDM/TDM Networks)
- Silica-Based Planar Lightwave Circuits for WDM Systems
- Circuit Technology for Giga-bit/Low Voltage Operating SOI-DRAM (Special Issue on SOI Devices and Their Process Technologies)
- Field Acceleration Model for Time-Dependent Dielectric Breakdown
- A Novel CMOS Structure with Polysilicon Source/Drain (PSD) Transistors by Self-Aligned Silicidation (Special Issue on Sub-Half Micron Si Device and Process Technologies)
- Performance Evaluation of a Multi-User MIMO System With Prediction of Time-Varying Indoor Channels
- Clarification of Nitridation Effect on Oxide Formation Methods
- Impact of Nitrogen Implantation on Highly Reliable Sub-Quarter-Micron Metal Oxide Field-Effect Transistors (MOSFETs) with Lightly Doped Drain Structure
- Substrate Engineering for Reduction of Alpha-Particle-Induced Charge Collection Efficiency