Miyoshi Hirokazu | Ulsi Laboratory Mitsubishi Electric Corporation

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概要

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著作論文

Suppression of Parasitic MOSFETs at LOCOS Edge Region in Partially Depleted SOI MOSFETs
Features of SOI DRAM's and their Potential for Low-Voltage and/or Giga-Bit Scale DRAM's (Special Issue on ULSI Memory Technology)
Impact of μA-ON-Current Gate-All-Around TFT (GAT) for Static RAM of 16Mb and beyond
Disk-Shaped Stacked Capacitor Cell for 256 Mb Dynamic Random-Access Memory
Soft-Error Study of DRAMs with Retrograde Well Structure by New Evaluation Method (Special Issue on Quarter Micron Si Device and Process Technologies)
Memory Array Architecture and Decoding Scheme for 3 V Only Sector Erasable DINOR Flash Memory (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
The Effects on Metal Oxide Semiconductor Field Effect Transistor Properties of Nitrogen Implantation into p^+ Polysilicon Gate
Reliability of Source-to-Drain Non-Uniformly Doped Channel (NUDC)MOSFETs for Sub-Quarter-Micron Region
Stable Solution Method for Viscoelastic Oxidation Including Stress-Dependent Viscosity
Clarification of Nitridation Effect on Oxide Formation Methods
Impact of Nitrogen Implantation on Highly Reliable Sub-Quarter-Micron Metal Oxide Field-Effect Transistors (MOSFETs) with Lightly Doped Drain Structure
Substrate Engineering for Reduction of Alpha-Particle-Induced Charge Collection Efficiency

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