Inoue Yasuo | Ulsi Development Center Mitsubishi Electric Corporation

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概要

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著作論文

Analysis and Optimization of Floating Body Cell Operation for High-Speed SOI-DRAM (Special Issue on Ultra-High-Speed IC and LSI Technology)
Suppression of Parasitic MOSFETs at LOCOS Edge Region in Partially Depleted SOI MOSFETs
Analysis of the Delay Distributions of 0.5μm SOI LSIs (Special Issue on SOI Devices and Their Process Technologies)
Features of SOI DRAM's and their Potential for Low-Voltage and/or Giga-Bit Scale DRAM's (Special Issue on ULSI Memory Technology)
Comparison of Standard and Low-Dose Separation-by-Implanted-Oxygen Substrates for 0.15 μm SOI MOSFET Applications
Comparison of Standard and Low-Dose SIMOX Substrates for 0.15μm SOI MOSFET Applications
Low-Voltage Operation of a High-Resistivity Load SOI SRAM Cell by Reduced Back-Gate-Bias Effect
Two-Dimensional Analytical Modeling of the Source/Drain Engineering Influemce on Short-Channel Effects in SOI MOSFET's
Analytical Modeling of Short-Channel Behavior of Accumulation-Mode Transistors on Silicon-on-Insulator Substrate
Impact of μA-ON-Current Gate-All-Around TFT (GAT) for Static RAM of 16Mb and beyond
Impact of μ A-ON-Current Gate All-Around TFT (GAT) for 16MSRAM and Beyond
Saturation Phenomenon of Stress-Induced Gate Leakage Current
Modified Gate Re-Oxidation Technology for High-Performance Embedded Dynamic RAM by Self-Adjusted Gate Bird's Beak
High performance 0.2μm Dual Gate Complementary MOS Technologies by Suppression of Transient-Enhanced-Diffusion using Rapid Thermal Annealing
Realistic Scaling Scenario for Sub-100 nm Embedded SRAM Based on 3-Dimensional Interconnect Simulation(the IEEE International Conference on SISPAD '02)
Leakage Mechanism of Local Junctions Forming the Main or Tail Mode of Retention Characteristics for Dynamic Random Access Memories
Leakage Mechanism of Local Junctions Forming Main or Tail Mode of DRAM Retention Characteristics
Advanced Retrograde Well Technology for 90-nm-Node Embedded Static Random Access Memory Using High-Energy Parallel Beam
The Effects on Metal Oxide Semiconductor Field Effect Transistor Properties of Nitrogen Implantation into p^+ Polysilicon Gate
A 0.4 μm Gate-All-Around TFT (GAT) Using a Dummy Nitride Pattern for High-Density Memories
Improvement of Surface Morphology of Epitaxial Silicon Film for Elevated Source/Drain Ultrathin Silicon-on-Insulator Complementary-Metal-Oxide-Semiconductor Devices
Modified Gate Re-Oxidation Technology for High-Performance Embedded Dynamic RAM by Self-Adjusted Gate Bird’s Beak
High-Speed SOI 1/8 Frequency Divider Using Field-Shield Body-Fixed Structure

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