A 0.4 μm Gate-All-Around TFT (GAT) Using a Dummy Nitride Pattern for High-Density Memories

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概要

• 論文の詳細を見る
• 社団法人応用物理学会の論文
• 1995-02-28

著者

• NISHIMURA Tadashi

  ULSI Laboratory, Mitsubishi Electric Corporation

• MAEDA Shigenobu

  ULSI Development Center, Mitsubishi Electric Corporation

• IPPOSHI Takashi

  ULSI Development Center, Mitsubishi Electric Corporation

• INOUE Yasuo

  ULSI Development Center, Mitsubishi Electric Corporation

• Tusbouchi Natsuro

  ULSI Laboratory, Mitsubishi Electric Corporation

• IPPOSHI Takashi

  Advanced Device Development Dept., Renesas Technology Corp.

• KURIYAMA Hirotada

  ULSI Laboratory, Mitsubishi Electric Corporation

• Inoue Y

  National Defense Acad. Yokosuka Jpn

• Maegawa Shigeto

  Advanced Device Development Dept. Renesas Technology Corp.

• Maeda Shigenobu

  Ulsi Development Center Mitsubishi Electric Corporation

• Ipposhi Takashi

  Advanced Device Development Dept. Renesas Technology Corp.

• Nishimura Tadashi

  The Ulsi Development Center Mitsubishi Electric Corporation

• Kuriyama Hiroyuki

  Sanyo Electric Co. Ltd.:giant Electronics Technology Co. Ltd.

• Inoue Y

  Ntt Access Network Service Systems Laboratories Ntt Corporation

• Ipposhi T

  Advanced Device Development Dept. Renesas Technology Corp.

• Tsubouchi N

  Ulsi Dev. Center Hyogo Jpn

• Maeagawa Shigeto

  ULSI Laboratory, Mitsubishi Electric Corporation

• Nishimura Hisayuki

  Ryoden Semiconductor System Engineering Corporation

• Tanina Osamu

  ULSI Laboratory, Mitsubishi Electric Corporation

• Tanina Osamu

  Ulsi Laboratory Mitsubishi Electric Corporation

• Inoue Yasuo

  Ulsi Development Center Mitsubishi Electric Corporation

• Tusbouchi Natsuro

  Ulsi Laboratory Mitsubishi Electric Corporation

• Nishimura Tadashi

  Ulsi Development Center Mitsubishi Electric Corporation

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