MAKINO Hiroshi | System LSI Development Center, Mitsubishi Electric Corporation

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著作論文

Novel VLIW Code Compaction Method for a 3D Geometry Processor
A Design of High-Speed 4-2 Compressor for Fast Multiplier (Special Issue on Ultra-High-Speed LSIs)
A Floating-Point Divider Using Redundant Binary Circuits and an Asynchronous Clock Scheme
A 2.6-ns 64-b Fast and Small CMOS Adder (Special Issue on Ultra-High-Speed LSIs)
Realistic Scaling Scenario for Sub-100 nm Embedded SRAM Based on 3-Dimensional Interconnect Simulation(the IEEE International Conference on SISPAD '02)

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