Suppression of Parasitic MOSFETs at LOCOS Edge Region in Partially Depleted SOI MOSFETs

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概要

• 論文の詳細を見る
• 社団法人応用物理学会の論文
• 1997-03-30

著者

• YAMAGUCHI Yasuo

  Institute for Materials Research, Tohoku University

• Yamaguchi Y

  Tohoku Univ. Sendai

• Yamaguchi Y

  Kumamoto Techno Res. Park Kumamoto Jpn

• IWAMATSU Toshiaki

  ULSI Laboratory, Mitsubishi Electric Corporation

• YAMAGUCHI Yasuo

  ULSI Laboratory, Mitsubishi Electric Corporation

• IPPOSHI Takashi

  ULSI Development Center, Mitsubishi Electric Corporation

• INOUE Yasuo

  ULSI Development Center, Mitsubishi Electric Corporation

• YASUOKA Akihiko

  ULSI Laboratory, Mitsubishi Electric Corporation

• MIYAMOTO Shoichi

  ULSI Laboratory, Mitsubishi Electric Corporation

• MIYOSHI Hirokazu

  ULSI Laboratory, Mitsubishi Electric Corporation

• IWAMATSU Toshiaki

  Advanced Device Development Dept., Renesas Technology Corp.

• IPPOSHI Takashi

  Advanced Device Development Dept., Renesas Technology Corp.

• Inoue Y

  National Defense Acad. Yokosuka Jpn

• Yamaguchi Y

  Central Workshop Osaka University

• Yasuoka Akihiko

  Ulsi Laboratory Mitsubishi Electric Corporation

• Ipposhi Takashi

  Advanced Device Development Dept. Renesas Technology Corp.

• Miyamoto Shouichi

  Ulsi Laboratory Mitsubishi Electric Corporation

• Miyoshi Hirokazu

  Ulsi Laboratory Mitsubishi Electric Corporation

• Iwamatsu Toshiaki

  Advanced Device Development Dept. Renesas Technology Corp.

• Inoue Y

  Ntt Access Network Service Systems Laboratories Ntt Corporation

• Ipposhi T

  Advanced Device Development Dept. Renesas Technology Corp.

• Miyoshi H

  Mitsubishi Electric Corp.

• Miyoshi Hirokazu

  徳島大学医学部

• Inoue Yasuo

  Ulsi Development Center Mitsubishi Electric Corporation

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