Message-Based Efficient Remote Memory Access on a Highly Parallel Computer EM-X (Special Issue on Architectures, Algorithms and Networks for Massively parallel Computing)

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Communication latency is central to multiprocessor design. This study presents the design principles of the EM-X distributed-memory multiprocessor toward;s tolerating communication latency. The EM-X overlaps computation with communication for latency tolerance by multithreading. In particular, we present two types of hardware support for remote memory access: (1) priority-based packet scheduling for thread invocation, and (2) direct remote memory access. The priority-based scheduling policy extends a FIFO ordered thread invocation policy to adopt to different computational needs. The direct remote memory access is designed to overlap remote memory operations with thread execution. The 80-processor prototype of EM-X is developed and is operational since December 1995. We execute several programs on the machine and evaluate how the EM-X effectively overlaps computation with communication toward tolerating communication latency for high performance parallel computing.
社団法人電子情報通信学会の論文
1996-08-25