Circuit-Level Electrothermal Simulation of Electrostatic Discharge in Integrated Circuits (Special lssue on SISPAD'99)

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概要

• 論文の詳細を見る

• A circuit-level electrothermal simulator, MICS (MItsubishi Circuit Simulator), is presented with parasitic bipolar transistor action and lattice heating taken into account. Diffusion capacitance in parasitic bipolar transistors is introduced to cover turn-on behavior under short rise-time current. Device temperatures are simulated from calculated electrical characteristics and the closed-form solution of the heat transfer equation. Simulation results show that this tool is valuable in evaluating electrostatic discharge (ESD) robustness in integrated circuits (ICs).

• 社団法人電子情報通信学会の論文
• 2000-08-25

著者

• NISHIMURA Tadashi

  ULSI Laboratory, Mitsubishi Electric Corporation

• Sonoda Ken-ichiro

  ULSI Laboratory, Mitsubishi Electric Corporation

• KOTANI Norihiko

  ULSI Laboratory, Mitsubishi Electric Corporation

• ISHIKAWA Kiyoshi

  ULSI Research and Development Center, Mitsubishi Electric Corporation

• Ishikawa K

  Mitsubishi Electric Corp. Itami‐shi Jpn

• Tanizawa Motoaki

  ULSI Development Center, Mitsubishi Electric Corporation

• Tanizawa Motoaki

  Ulsi Development Center Mitsubishi Electric Corporation

• Ishikawa Kiyoshi

  Ulsi Development Center Mitsubishi Electric Corporation

• Kotani N

  Ulsi Development Center Mitsubishi Electric Corporation

• Kotani Norihiko

  Ulsi Laboratory Mitsubishi Electric Corporation

• Sonoda K

  Ulsi Development Center Mitsubishi Electric Corporation

• Nishimura Tadashi

  Ulsi Development Center Mitsubishi Electric Corporation

• Kotani Norihiko

  ULSI Development Center, Mitsubishi Electric Corporation

• Sonoda Ken-ichiro

  ULSI Development Center, Mitsubishi Electric Corporation

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