New P-MOSFET Hot-Carrier Degradation Model for Bi-Directional Operation

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Partially Depleted SOI Technology with Body-Tied Hybrid Trench Isolation for High-Speed System-On-a-Chip Application(Special Issue on Integrated Systems with New Concepts)
Direct Measurement of Transient Drain Currents in Partially-Depleted SOI N-Channel MOSFETs Using a Nuclear Microprobe for Highly Reliable Device Designs
The Influence of the Buried Oxide Defects on the Gate Oxide Reliability and Drain Leakage Currents of the Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors
Low-Voltage Operation of a High-Resistivity Load SOI SRAM Cell by Reduced Back-Gate-Bias Effect
Two-Dimensional Analytical Modeling of the Source/Drain Engineering Influemce on Short-Channel Effects in SOI MOSFET's
Analytical Modeling of Short-Channel Behavior of Accumulation-Mode Transistors on Silicon-on-Insulator Substrate
Suppression of Self-Heating in Hybrid Trench Isolated SOI MOSFETs with Poly-Si plug and W plug
Control of Carrier Collection Efficiency in n^+p Diode with Retrograde Well and Epitaxial Layers
Optimization of Nitridation and Reoxidation Conditions for EEPROM^* Tunneling Dielectric
A High Density High Performance Cell for 4M Bit Full Feature Electrically Erasable/Programmable Read-Only Memory
W-Polymetal Gate with Low W/Poly-Si Interface Resistance for High-Speed/High-Density Embedded Memory
High performance 0.2μm Dual Gate Complementary MOS Technologies by Suppression of Transient-Enhanced-Diffusion using Rapid Thermal Annealing
Scalability of Gate/N^- Overlapped Lightly Doped Drain in Deep-Submicrometer Regime
Subquarter-micrometer Dual Gate Complementary Metal Oxide Semiconductor Field Effect Transistor with Ultrathin Gate Oxide of 2 nm
Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS) (Special Section on High Speed and High Density Multi Functional LSI Memories)
A 90nm-node SOI Technology for RF Applications
Clarification of Nitridation Effect on Oxide Formation Methods
Circuit-Level Electrothermal Simulation of Electrostatic Discharge in Integrated Circuits (Special lssue on SISPAD'99)
Proximity Gettering of Heavy Metals by High-Energy Ion Implantation
New P-MOSFET Hot-Carrier Degradation Model for Bi-Directional Operation
Application of Proximity Effect Correction Usirng Pattern-Area Density to Patterning on a Heavy-Metal Substrate and the Cell-Projection Exposure
Leakage Mechanism of Local Junctions Forming the Main or Tail Mode of Retention Characteristics for Dynamic Random Access Memories
Leakage Mechanism of Local Junctions Forming Main or Tail Mode of DRAM Retention Characteristics
Bipolar Transistor with a Buried Layer Formed by High-Energy Ion Implantation for Subhalf-Micron Bipolar-Complementary Metal Oxide Semiconductor LSIs
Advanced Retrograde Well Technology for 90-nm-Node Embedded Static Random Access Memory Using High-Energy Parallel Beam
The Effects on Metal Oxide Semiconductor Field Effect Transistor Properties of Nitrogen Implantation into p^+ Polysilicon Gate
Reliability of Source-to-Drain Non-Uniformly Doped Channel (NUDC)MOSFETs for Sub-Quarter-Micron Region
Substrate Engineering for Reduction of Alpha-Particle-Induced Charge Collection Efficiency
Impact of Nitrogen Implantation on Highly Reliable Sub-Quarter-Micron Metal Oxide Field-Effect Transistors (MOSFETs) with Lightly Doped Drain Structure
The Impact of Nitrogen Implantation into Highty Doped Polysilicon Gates for flighty Reliable and High-Performance Sob-Quarter-Micron Dual-Gate Complementary Metal Oxide Semiconductor
A 0.4 μm Gate-All-Around TFT (GAT) Using a Dummy Nitride Pattern for High-Density Memories
A Novel CMOS Structure with Polysilicon Source/Drain (PSD) Transistors by Self-Aligned Silicidation (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Clarification of Nitridation Effect on Oxide Formation Methods
W-Polymetal Gate with Low W/Poly-Si Interface Resistance for High-Speed/High-Density Embedded Memory
Impact of Nitrogen Implantation on Highly Reliable Sub-Quarter-Micron Metal Oxide Field-Effect Transistors (MOSFETs) with Lightly Doped Drain Structure
Substrate Engineering for Reduction of Alpha-Particle-Induced Charge Collection Efficiency

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