Analytical Single-Electron Transistor(SET)Model for Design and Analysis of Realistic SET Circuits

スポンサーリンク

概要

• 論文の詳細を見る
• 社団法人応用物理学会の論文
• 2000-04-30

著者

• Toriumi Akira

  Mirai-advanced Semiconductor Research Center (mirai-asrc) National Institute Of Advanced Industrial

• Toriumi Akira

  Advanced Lsi Technology Laboratory Toshiba Corporation

• Toriumi Akira

  Advanced Lsi Technology Toshiba Corporation

• Takagi S

  Process & Manufacturing Center Semiconductor Company Toshiba Corporation

• TAKAGI Shin-ichi

  Advanced LSI Technology Laboratory, Toshiba Corporation

• KOGA Junji

  Advanced LSI Technology Laboratory, Research and Development Center, Toshiba Corporation

• UCHIDA Ken

  Advanced LSI Technology Laboratory, Research & Development Center, Toshiba Corporation

• MATSUZAWA Kazuya

  Advanced LSI Technology Laboratory, Toshiba Corporation

• OHBA Ryuji

  Advanced LSI Technology Laboratory, Toshiba Corporation

• Matsuzawa Kazuya

  Semiconductor Technology Academic Research Center (starc)

• Matsuzawa Kazuya

  Advanced Lsi Technology Laboratory Research & Development Center Toshiba Corporation

• Matsuzawa Kazuya

  Advanced Lsi Technology Laboratory Corporate Research & Development Center Toshiba Corporation

• Ohba R

  Advanced Lsi Technology Laboratory Toshiba Corporation

• Koga J

  Advanced Lsi Technology Laboratory Research And Development Center Toshiba Corporation

• Koga Junji

  Advanced Lsi Technology Laboratory Corporate R & D Center Toshiba Corporation

• Uchida K

  Advanced Lsi Technology Laboratory Toshiba Corporation

• Takagi Shin-ichi

  Advanced Lsi Technology Laboratory Research & Development Center Toshiba Corporation

• Toriumi Akira

  Advanced Lsi Technology Laboratory Research & Development Center Toshiba Co.

• Matsuzawa K

  Toshiba Corp. Yokohama‐shi Jpn

• Toriumi Akira

  Advanced Lsi Technology Laboratory Corporate R&d Center Toshiba Corporation

• Toriumi Akira

  Mirai-asrc Aist

• Uchida Ken

  Advanced Lsi Technology Laboratory Toshiba Corporation

• Takagi Shin-ichi

  Advanced Lsi Technology Laboratory Corporate Research & Development Center Toshiha Corporation

• Uchida Ken

  Corporate R&d Center Toshiba Corporation

• Ohba Ryuji

  Advanced LSI laboratory, Corporate R&D Center, Toshiba Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan

• Uchida Ken

  Advanced LSI laboratory, Corporate R&D Center, Toshiba Corporation, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan

関連論文

• Anomalous positive V_ shift in HfAlO_x MOS gate stacks
• Study of La Concentration Dependent V_ Shift in Metal/HfLaOx/Si Capacitors
• Field-Dependent Mobility of Highly Oriented Pentacene Thin-Film Transistors
• Influence of Thermal Noise on Drain Current in Very Small Si-MOSFETs
• Influence of Intrinsic Current Fluctuation in Very Small Si-MOSFETs
• Current Fluctuation Characteristic of Sub-0.1 Micron Device Structures:A Monte Carlo Study
• Ge/GeO_2 Interface Control with High-Pressure Oxidation for Improving Electrical Characteristics
• Mobility Variations in Mono- and Multi-Layer Graphene Films
• Low Temperature Phosphorus Activation in Germanium through Nickel Germanidation for Shallow n^+/p Junction
• A Significant Shift of Schottky Barrier Heights at Strongly Pinned Metal/Germanium Interface by Inserting an Ultra-Thin Insulating Film
• Grain Size Increase and Field-Effect Mobility Enhancement of Pentacene Thin Films Prepared in a Low-Pressure H_2 Ambient
• Evidence of Electron Trapping Center at Pentacene/SiO_2 Interface
• Origin of Structural Phase Transformation of SiO_2-doped HfO_2
• Advanced Characterization of High-k Gate Stack by Internal Photo Emission (IPE) : Interfacial Dipole and Band Diagram in Al/Hf(Si)O_2/Si MOS Structure
• Effect of Ultra-thin Al_2O_3 Insertion on Fermi-level Pinning at Metal/Ge Interface
• Thermally Robust Germanium MIS Gate Stacks with LaYO_3 Dielectric Film
• Direct Evidence of GeO Volatilization from GeO_2 Films and Impact of Its Suppression on GeO_2/Ge MIS Characteristics
• Reduction of Bias-Induced Threshold Voltage Shift in Pentacene Field Effect Transistors by Interface Modification and Molecular Ordering
• Suppression of Leakage Current and Moisture Absorption of La_2O_3 films with Ultraviolet Ozone Post Treatment
• Excellent Leakage Current of Crystallized Silicon-Doped HfO_2 Films Down to Sub-nm EOT
• Thermally Robust Y_2O_3/Ge MOS Capacitors
• Moisture Absorption-Induced Permittivity Deterioration and Surface Roughness Enhancement of Lanthanum Oxide Films on Silicon
• Design Methodology for La_2O_3-Based Ternally Higher-κ Dielectrics
• A New Hf-based Dielectric Member, HfLaOx, for Amorphous High-k Gate Insulators in Advanced CMOS
• Generalized Model of Oxidation Mechanism at HfO_2/Si Interface with Post-Deposition Annealing
• Dielectric Constant Increase of Yttrium-Doped HfO_2 by Structural Phase Modification
• Far Infrared Study of Structural Distortion and Transformation of HfO_2 by Introducing a Slight Amount of Si
• Stable Observation of the Evolution of Leakage Spots in HfO_2/SiO_2 stacked structures by UHV-C-AFM
• Difference between O_2 and N_2 Annealing Effects on CVD-SiO_2 Film Quality Studied by the Time-Dependent OCP Measurement
• Advantages of Ge (111) Surface for High Quality HfO_2/Ge Interface
• A Guideline for Accurate Two-Frequency Capacitance Measurement for Ultra-Thin Gate Oxides
• Two Correlated Mechanisms in Thin SiO_2 Breakdown
• Reliability of Structurally Modified Ultra-Thin Gate Oxides
• Advanced SOI MOSFET's with Strained-Si/SiGe Heterostructures(Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
• Novel Fabrication Technique for Relaxed SiGe-on-Insulator Substrates without Thick SiGe Buffer Structures
• A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100nm Strained Silicon-on-Insulator MOSFETs
• A Novel Fabrication Technique of Ultra-Thin and Relaxed SiGe Buffer Layers with High Ge Content for Sub-100nm Strained Silicon-on-Insulator MOSFETs
• Influence of High Dielectric Constant in Gate Insulator on Remote Coulomb Scattering due to Gate Impurities in Si MOS Inversion Layer
• Physical Origins of Surface Carrier Density Dependences of Interface- and Remote-Coulomb Scattering Mobility in Si MOS Inversion Layer
• Unified Roughness Scattering Model Incorporating Scattering Component Induced by Thickness Fluctuation in SOI MOSFETs
• Quantitative Understanding of Mobility Degradation in High Effective Electric Field Region in MOSFETs with Ultra-thin Gate Oxides
• Quantitative Examination of Mobility Lowering Associated with Ultrathin Gate Oxides in Silicon Metal-Oxide-Semiconductor Inversion Layer
• Analytical Single-Electron Transistor(SET)Model for Design and Analysis of Realistic SET Circuits
• New Approach to Negative Differential Conductance with High Peak-to-Valley Ratio in Silicon
• Mobility Enhancement of SOI MOSFETs due to Subband Modulation in Ultrathin SOI Films
• Mobility Enhancement of SOI MOSFETs Due to Subband Modulation in Ultra-Thin SOI Films
• Observation of Oxide-Thickness-Dependent Interface Roughness in Si MOS Structure
• Observation of Oxide Thickness Dependent Interface Roughness in Si MOS Structure
• Random Number Generator with 0.3MHz Generation Rate using Non-Stoichiometric Si_xN MOSFET
• Non-Volatile Doubly Stacked Si Dot Memory with Si Nano-Crystalline Layer
• Comparative Studies on Oxygen Diffusion Coefficients for Amorphous and γ-Al_2O_3 Films using ^O Isotope
• Importance of Leakage Current Noise Analysis for Accurate Lifetime Prediction of High-k Gate Dielectrics
• Analytical Modeling of Metal Oxide Semiconductor Inversion-Layer Capacitance
• Weak Temperature Dependence of Non-Coulomb Scattering Component of HfAlO_x-Limited Inversion Layer Mobility in n^+-Polysilicon/HfAlO_x/SiO_2 N-Channel Metal-Oxide-Semiconductor Field-Effect Transistors
• Guidelines for the threshold voltage control of metal/HfSiON system(Session2: Silicon Devices I)
• Guidelines for the threshold voltage control of metal/HfSiON system(Session2: Silicon Devices I)
• Material Characterization of Metal-germanide Gate Electrodes Formed by FUGE (Fully Germanided) Process
• Germanium-induced Modulation of Work Function and Impurity Segregation Effect in Fully-Ni-germanosilicide (Ni(Si_Ge_x)) Gate
• Silicon-Atom Induced Fermi-Level Pinning of Fully Silicided Platinum Gates on HfO_2 Dielectrics
• Study on Oxynitride Buffer Layers in HfO_2 Metal-Insulator-Semiconductor Structures for Improving Metal-Insulator-Semiconductor Field-Effect Transistor Performance
• Degradation Mechanism of HfAlO_x/SiO_2 Stacked Gate Dielectric Films through Transient and Steady State Leakage Current Analysis
• Probability Distribution of Threshold Voltage Fluctuations in Metal-OXide-Semiconductor Field-Effect-Transistors : Semiconductors
• Improvement of Memory Characteristics of Metal-Ferroelectrics/Insulating Buffer Layer/Semiconductor Structures by Combination of Pulsed Laser Deposited SrBi_2Ta_2O_9 Films and Ultra-Thin SiN Buffer Layers
• Improvement of Memory Characteristics of MFIS Structures by Combination of Pulsed Laser Deposited SrBi_2Ta_2O_9 Films and Ultra-Thin SiN Buffer Layers
• Phenomenological Studies in Laser Cladding. Part II. : Thermometrical Experiments on the Melt Pool
• Phenomenological Studies in Laser Cladding. Part I. : Time-Resolved Measurements of the Absorptivity of Metal Powder
• Impact of Surface Hydrophilicization prior to Atomic Layer Deposition for HfO_2/Si Direct-Contact Gate Stacks
• Impact of Initial Traps on TDDB and NBTI Reliabilities in High-k Gate Dielectrics
• Si-Capped Annealing of HfO_2-based Dielectrics for Suppressing Interface Layer Growth and Oxygen Out-Diffusion
• The first principles calculations of Fermi level pinning in FUSI/PtSi/HfO_2/Si system induced by local distortion of HfO_2
• Theoretical analysis of the Fermi level pinning in HfO_2/Si system induced by the interface defect states
• Gate Depletion Effect Reduction and Flat-band Voltage Control in Poly-Si/HfAlO_x MOSFETs with Nanometer TaN Dots at the Top Interface
• Effects of Aluminum and Nitrogen Profile Control on Electrical Properties of HfAlON Gate Dielectric MOSFETs
• Theoretical Analysis of Interstitial Boron Diffusion and Its Suppression Mechanism with Nitrogen in Amorphous HfO_2
• Flat-band Voltage Tunability and No Depletion Effect of Poly-Si Gate CMOS with Nanometer-size Metal Dots at the Poly-Si/Dielectric Interface
• Accurate Evaluation of Inversion-Layer Mobility and Experimental Extraction of Local Strain Effect in sub-μm Si MOSFETs
• Observation of Dipole Layer Formed at High-k Dielectrics/SiO_2 Interface with X-ray Photoelectron Spectroscopy
• Determinatuon of the Sense of Burgers Vector by Plane-Wave X-ray Topography
• Novel Si Quantum Memory Structure with Self-Aligned Stacked Nanocrystalline Dots
• Influence of Channel Depletion on the Carrier Charging Characteristics in Si Nanocrystal Floating Gate Memory
• Experimental Analysis of Carrier Charging Characteristics in Si Nanocrystal Floating Gate Memory
• Permittivity Enhancement of Hf_Si_xO_2 Film with High Temperature Annealing
• Thermal Stability of a Thin HfO_2/Ultrathin SiO_2/Si Structure : Interfacial Si Oxidation and Silicidation
• Experimental Study of Uniaxial Stress Effects on Coulomb-limited Electron and Hole Mobility in Si-MOSFETs
• Deuterium Effect on Both Interface-State Generation and Stress-Induced-Leakage-Current under Fowler-Nordheim Electron Injection
• A Study of the Effect of Deuterium on Stress-Induced Leakage Current
• Time Evolution of Mean and Dispersion in Si/SiO_2 Interface States Generation Statistics
• Merits and Demerits of Single Electron Effects in Ultrasmall Semiconductor Devices
• Power Consumption of Hybrid Circuits of Single-Electron Transistors and Complementary Metal-Oxide-Semiconductor Field-Effect Transistors
• Silicon Planar Esaki Diode Operating at Room Temperature
• SET/CMOS Hybrid for Future Low-Power LSI : Experimental Demonstration, Power Estimation, and Strategy for Its Reduction
• Challenge to new silicon devices
• A New Design Scheme for Logic Circuits with Single Electron Transistors
• Study on Zr-Silicate Interfacial Layer of ZrO_2-MIS Structure Fabricated by Pulsed Laser Ablation Deposition Method
• High-Electron-Mobility Ge n-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with High-Pressure Oxidized Y_2O_3
• Monte Carlo Simulation of Sub-0.1μm Devices with Schottky Contact Model (Special lssue on SISPAD'99)
• High Dielectric Constant of a Mixture of N-Alkyl Aliphatic Amides
• Comprehensive Understanding of Electron and Hole Mobility Limited by Surface Roughness Scattering in Pure Oxides and Oxynitrides Based on Correlation Function of Surface Roughness
• Comprehensive Understanding of Electron and Hole Mobility Limited by Surface Roughness Scattering in Pure Oxides and Oxynitrides Based on Correlation Function of Surface Roughness
• Higher-k Scalability and Leakage Current Reduction of SiO-Doped HfO in Direct Tunneling Regime

もっと見る 閉じる

スポンサーリンク