Uchida Ken | Advanced LSI laboratory, Corporate R&D Center, Toshiba Corporation, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan

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著作論文

Unified Roughness Scattering Model Incorporating Scattering Component Induced by Thickness Fluctuation in SOI MOSFETs
Analytical Single-Electron Transistor(SET)Model for Design and Analysis of Realistic SET Circuits
Random Number Generator with 0.3MHz Generation Rate using Non-Stoichiometric Si_xN MOSFET
Non-Volatile Doubly Stacked Si Dot Memory with Si Nano-Crystalline Layer
Novel Si Quantum Memory Structure with Self-Aligned Stacked Nanocrystalline Dots
Influence of Channel Depletion on the Carrier Charging Characteristics in Si Nanocrystal Floating Gate Memory
Experimental Analysis of Carrier Charging Characteristics in Si Nanocrystal Floating Gate Memory
Experimental Study of Uniaxial Stress Effects on Coulomb-limited Electron and Hole Mobility in Si-MOSFETs
SET/CMOS Hybrid for Future Low-Power LSI : Experimental Demonstration, Power Estimation, and Strategy for Its Reduction
A New Design Scheme for Logic Circuits with Single Electron Transistors
Monte Carlo Simulation of Sub-0.1μm Devices with Schottky Contact Model (Special lssue on SISPAD'99)
The Effect of Side Traps on Ballistic Transistor in Kondo Regime
Unified Roughness Scattering Model Incorporating Scattering Component Induced by Thickness Fluctuations in Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors
Non-Stoichiometric SixN Metal–Oxide–Semiconductor Field-Effect Transistor for Compact Random Number Generator with 0.3 Mbit/s Generation Rate

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