Silicon Planar Esaki Diode Operating at Room Temperature

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概要

• 論文の詳細を見る

• Negative differential conductance based on lateral interband tunnel effect is demonstrated in a planar degenerate p^+-n^+ diode (Esaki tunnel diode). The device is fabricated with the current silicon ultralarge scale integration (Si ULSI) process, paying attention to the processing damage so as to reduce an excess tunnel current that flows over some intermediate states in the tunnel junction. I-V characteristics at a low temperature clearly show an intrinsic electron transport, indicating phonon-assisted tunneling in Si as in the case of the previous Esaki diodes fabricated by the alloying method. In addition, a simple circuit function of bistable operation is demonstrated by connecting the planar Esaki diode with conventional Si metal-oxide-semiconductor field effect transistors (MOSFETs). The planar Esaki diode will be a promising device element in the functional library for enhancing the total system performance for the coming system-on-a-chip (SoC) era.

• 社団法人電子情報通信学会の論文
• 2001-08-01

著者

• Toriumi Akira

  Mirai-advanced Semiconductor Research Center (mirai-asrc) National Institute Of Advanced Industrial

• Toriumi Akira

  The Authors Are With Advanced Lsi Technology Laboratory Toshiba Corporation:presently With The Depar

• Toriumi Akira

  Advanced Lsi Technology Toshiba Corporation

• KOGA Junji

  Advanced LSI Technology Laboratory, Research and Development Center, Toshiba Corporation

• Koga J

  Advanced Lsi Technology Laboratory Research And Development Center Toshiba Corporation

• KOGA Junji

  The authors are with Advanced LSI Technology Laboratory, Toshiba Corporation

• Toriumi Akira

  Mirai-asrc Aist

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