A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100nm Strained Silicon-on-Insulator MOSFETs
スポンサーリンク
概要
- 論文の詳細を見る
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2001-04-01
著者
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Takagi S
Mirai-national Institute Of Advanced Industrial Science And Technology (aist)
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MIZUNO Tomohisa
Advanced LSI Technology Laboratory, Toshiba Corporation
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SUGIYAMA Naoharu
Advanced LSI Technology Laboratory, Toshiba Corporation
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TAKAGI Shin-ichi
Advanced LSI Technology Laboratory, Toshiba Corporation
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TEZUKA Tsutomu
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation
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SUZUKI Masamichi
Environmental Engineering & Analysis Center, Corporate R&D Center, Toshiba Corporation
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Sugiyama N
Mirai-association Of Super-advanced Electronics Technology (aset)
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Sugiyama N
Research And Development Center Toshiba Corporation
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Sugiyama Naoharu
Advanced Lsi Technology Laboratory Research And Development Center Toshiba Corporation
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Takagi Shin-ichi
Advanced Lsi Technology Laboratory Research & Development Center Toshiba Corporation
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Tezuka T
Mirai-aset
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Mizuno T
Nippon Leiz Co. Ltd. Tama‐shi Jpn
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Suzuki Masamichi
Environmental Engineering And Analysis Center Corporate Research & Development Center Toshiba Co
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Takagi Shin-ichi
Advanced Lsi Technology Laboratory Corporate Research & Development Center Toshiha Corporation
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Tezuka Tsutomu
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1 Komukai-Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan
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MIZUNO Tomohisa
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation
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