Formation of SiGe on Insulator Structure and Approach to Obtain Highly Strained Si Layer for MOSFETs
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概要
- 論文の詳細を見る
The formation of a SiGe layer on insulators, which can be realized by applying the separation by implanted oxygen (SIMOX) technique to SiGe layers, is essential for fabricating strained silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs). In this study, the SIMOX process for SiGe films is examined in terms of Ge diffusion during SIMOX annealing and the annealing temperature. It is found that the SIMOX annealing at temperature above 1300°C is necessary to realize uniform buried oxides, even though the melting point of SiGe crystal decreases with the Ge content. Ge diffusion during high-temperature annealing must also be taken into account when preparing the SiGe layer for SIMOX@. These facts indicate that the realization of a SiGe layer on buried oxides is difficult with the simple SIMOX process for SiGe crystal, particularly so in the case of high Ge content. In order to overcome this problem, the double layer SiGe structure on an insulator is proposed and the effectiveness of this structure on the increase of strain in Si is verified experimentally. The strain relaxation of the SiGe layer with higher Ge content, which is grown on the SiGe layer with lower Ge content, is observed with expanding of the under-layer.
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2001-04-30
著者
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SUZUKI Masamichi
Environmental Engineering & Analysis Center, Corporate R&D Center, Toshiba Corporation
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TAKAGI Sin-ichi
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation
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Sugiyama Naoharu
Advanced Lsi Technology Laboratory Research And Development Center Toshiba Corporation
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Mizuno Tomohisa
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan
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Sugiyama Naoharu
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan
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Suzuki Masamichi
Environmental Engineering & Analysis Center, Corporate R&D Center, Toshiba Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan
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Takagi Sin-ichi
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan
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MIZUNO Tomohisa
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation
関連論文
- Advanced SOI MOSFET's with Strained-Si/SiGe Heterostructures(Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
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- Formation of SiGe on Insulator Structure and Approach to Obtain Highly Strained Si Layer for MOSFETs
- A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100nm Strained Silicon-on-Insulator MOSFETs
- A Novel Fabrication Technique of Ultra-Thin and Relaxed SiGe Buffer Layers with High Ge Content for Sub-100nm Strained Silicon-on-Insulator MOSFETs
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