Sub 1.3nm Amorphous Ta_2O_5 Gate Dielectrics for Damascene Metal Gate Transistor
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概要
- 論文の詳細を見る
- 1999-09-20
著者
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Saito Tomohiro
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corp.
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Inumiya Seiji
Microelectronics Engineering Laboratory Semiconductor Company Toshiba Corporation
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TSUNASHIMA Yoshitaka
Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation
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OZAWA Yoshio
Microelectronics Engineering Laboratory, Toshiba Corp.
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YAGISHITA Atsushi
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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SAITO Tomohiro
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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HOTTA Masaki
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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SUGURO Kyoichi
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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TSUNASHIMA Yoshitaka
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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ARIKADO Tsunetoshi
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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Saito T
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corp.
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Tsunashima Y
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
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Tsunashima Yoshitaka
Microelectronics Engineering Laboratory Toshiba Corp.
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Arikado T
Semiconductor Leading Edge Technologies Inc.
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Hotta Masaki
Microelectronics Engineering Laboratory Semiconductor Company Toshiba Corporation
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Ozawa Yoshio
Microelectronics Engineering Laboratory Semiconductor Company Toshiba Corporation
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Suguro K
Toshiba Corporation Semiconductor Company
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Yagishita A
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
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Saito T
School Of Engineering Nagoya University
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Suguro Kyoichi
Toshiba Corporation Semiconductor Company
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Arikado Tunetoshi
Microelectronics Engineering Laboratory Semiconductor Company Toshiba Corporation
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