Retarding Mechanism of Si Selective Epitaxial Growth on CMOS Structure due to Doped Arsenic in the Si Substrate
スポンサーリンク
概要
- 論文の詳細を見る
- 2000-08-28
著者
-
Miyano K
Toshiba Corp. Yokohama Jpn
-
MIZUSHIMA Ichiro
Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation
-
MIYANO Kiyotaka
Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation
-
TSUNASHIMA Yoshitaka
Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation
-
Mizushima I
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
-
Mizushima Ichiro
Process & Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
-
Tsunashima Y
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
-
Tsunashima Yoshitaka
Process & Manufacturing Center Semiconductor Company Toshiba Corporation
-
Miyano Kiyotaka
Process & Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
-
MIZUSHIMA Ichiro
Process & Manufactruing Engineering Center, Semiconductor Company, Toshiba Corporation
-
TSUNASHIMA Yoshitaka
Process & Manufactruing Engineering Center, Semiconductor Company, Toshiba Corporation
関連論文
- Defects Induced by Carbon Contamination in Low-Temperature Epitaxial Silicon Films Grown with Monosilane
- Sub-1.3 nm Amorphous Tantalum Pentoxide Gate Dielectrics for Damascene Metal Gate Transistors
- Sub 1.3nm Amorphous Ta_2O_5 Gate Dielectrics for Damascene Metal Gate Transistor
- Highly Uniform Low-Pressure Chemical Vapor Deposition (LP-CVD) of Si_3N_4 Film on Tungsten for Advanced Low-Resistivity "Polymetal" Gate Interconnects
- Fabrication of Silicon-on-Nothing Structure by Substrate Engineering Using the Empty-Space-in-Silicon Formation Technique
- Effects of Nitrogen Concentration and Post-treatment on Reliability of HfSiON Gate Dielectrics in Inversion States
- Low-Standby-Power Complementary Metal-Oxide-Semiconductor Transistors with TiN Single Gate on 1.8 nm Gate Oxide
- Diffusion and Segregation of Carbon in SiO_2 Films
- Micro-structure Transformation of Silicon : A Newly Developed Transformation Technology for Patternin Silicon Surfaces using the Surface Migration of Silico Atoms by Hydrogen Annealing
- Mechanism of Defect Formation during Low-Temperature Si Epitaxy on Clean Si Substrate
- Dominant Factor for the Concentration of Phosphorus Introduced by Vapor Phase Doping (VPD)
- Dominant Factor for the Concentration of Phosphorus Introduced by Vapor Phase Doping
- Determination of Band Alignment of Hafnium Silicon Oxynitride/Silicon (HfSiON/Si) Structures using Electron Spectroscopy
- Novel Elevated Source/Drain Technology for FinFET Overcoming Agglomeration and Facet Problems Utilizing Solid Phase Epitaxy
- Retarding Mechanism of Si Selective Epitaxial Growth on CMOS Structure due to Doped Arsenic in the Si Substrate
- Influence of Reactive Ion Etching Applied to Si Substrate on Epitaxial Si Growth and Its Removal
- Facet-Free Si Selective Epitaxial Growth Adaptable to Elevated Source/Drain MOSFETs with Narrow Shallow Trench Isolation
- Facet-Free Si Selective Epitaxial Growth Adaptable to Elevated Source/Drain MOSFETs with Narrow STI
- Highly Uniform Deposition of LP-CVD 3i3N4 Films on Tungsten for Advanced Low Resistivity "Poly-Metal" Gate Interconnects
- Capillary Wave Propagation on Water Covered with Polyamic Acid Monolayer Films
- SOI/Bulk Hybrid Wafer Fabrication Process Using Selective Epitaxial Growth (SEG) Technique for High-End SoC Applications
- Determination of Band Alignment of Hafnium Silicon Oxynitride/Silicon (HfSiON/Si) Structures using Electron Spectroscopy
- Formation of Ultrathin SiON Films on Si Substrates Having Different Orientations
- Hole Generation without Annealing in High Dose Boron Implanted Silicon : Heavy Doping by B_ Icosahedron as a Double Acceptor
- Defects Induced by Carbon Contamination in Low-Temperature Epitaxial Silicon Films Grown with Monosilane
- Performance and Reliability Improvement of HfSiON Field-Effect Transistor with Low Hafnium Concentration Cap Layer Formed by Metal Organic Chemical Vapor Deposition with Diethylsilane
- Effects of Nitrogen Concentration and Post-treatment on Reliability of HfSiON Gate Dielectrics in Inversion States
- SOI/Bulk Hybrid Wafer Fabrication Process Using Selective Epitaxial Growth (SEG) Technique for High-End SoC Applications