TSUNASHIMA Yoshitaka | Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation

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概要

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著作論文

Defects Induced by Carbon Contamination in Low-Temperature Epitaxial Silicon Films Grown with Monosilane
Sub-1.3 nm Amorphous Tantalum Pentoxide Gate Dielectrics for Damascene Metal Gate Transistors
Sub 1.3nm Amorphous Ta_2O_5 Gate Dielectrics for Damascene Metal Gate Transistor
Fabrication of Silicon-on-Nothing Structure by Substrate Engineering Using the Empty-Space-in-Silicon Formation Technique
Effects of Nitrogen Concentration and Post-treatment on Reliability of HfSiON Gate Dielectrics in Inversion States
Low-Standby-Power Complementary Metal-Oxide-Semiconductor Transistors with TiN Single Gate on 1.8 nm Gate Oxide
Micro-structure Transformation of Silicon : A Newly Developed Transformation Technology for Patternin Silicon Surfaces using the Surface Migration of Silico Atoms by Hydrogen Annealing
Mechanism of Defect Formation during Low-Temperature Si Epitaxy on Clean Si Substrate
Dominant Factor for the Concentration of Phosphorus Introduced by Vapor Phase Doping (VPD)
Dominant Factor for the Concentration of Phosphorus Introduced by Vapor Phase Doping
Determination of Band Alignment of Hafnium Silicon Oxynitride/Silicon (HfSiON/Si) Structures using Electron Spectroscopy
Novel Elevated Source/Drain Technology for FinFET Overcoming Agglomeration and Facet Problems Utilizing Solid Phase Epitaxy
Retarding Mechanism of Si Selective Epitaxial Growth on CMOS Structure due to Doped Arsenic in the Si Substrate
Facet-Free Si Selective Epitaxial Growth Adaptable to Elevated Source/Drain MOSFETs with Narrow Shallow Trench Isolation
Facet-Free Si Selective Epitaxial Growth Adaptable to Elevated Source/Drain MOSFETs with Narrow STI

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