Suguro Kyoichi | Process & Manufacturing Engineering Center Semiconductor Company Toshiba Corporation

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概要

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著作論文

Ultrashallow Junction Formation for Sub-100nm Complementary Metal-Oxide-Semiconductor Field-Effect Transistor by Controlling Transient Enhanced Diffusion
New Charge Control Technology by Stencil Mask Ion Implantation
Low-Standby-Power Complementary Metal-Oxide-Semiconductor Transistors with TiN Single Gate on 1.8 nm Gate Oxide
Reduction in PN Junction Leakage for Ni-silicided Small Si Islands by Using Thermal Conduction Heating with Stacked Hot Plates
Low Leakage TiO_2 Gate Insulator Formed by Ultrathin TiN Deposition and Low-Temperature Oxidation
Novel Elevated Source/Drain Technology for FinFET Overcoming Agglomeration and Facet Problems Utilizing Solid Phase Epitaxy
10-15nm Ultrashallow Junction Formation by Flash-Lamp Annealing
Reduction in pn Junction Leakage for Ni-Silicided Small Si Islands by Using Improved Convection Annealing
Work Function Modulation by Segregation of Indium through Tungsten Gate for Dual-Metal-Gate Complementary Metal Oxide Semiconductor Applications
Surface Channel Metal Gate Complementary MOS with Light Counter Doping and Single Work Function Gate Electrode
Impact of Flash Lamp Annealing on 20-nm-Gate-Length Metal Oxide Silicon Field Effect Transistors

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