Mechanism of Defect Formation during Low-Temperature Si Epitaxy on Clean Si Substrate
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概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1999-04-30
著者
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Miyano K
Toshiba Corp. Yokohama Jpn
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TSUNASHIMA Yoshitaka
Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation
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MIZUSHIMA Ichiro
Microelectronics Engineering Laboratory, Toshiba Corp.
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TSUNASHIMA Yoshitaka
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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MIYANO Kiyotaka
Microelectronics Engineering Laboratory, Toshiba Corp.
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Mitsutake K
Toshiba Corp. Yokohama Jpn
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Mizushima I
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
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Mizushima Ichiro
Microelectronics Engineering Laboratory Semiconductor Company Toshiba Corporation
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Tsunashima Y
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
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Tsunashima Yoshitaka
Microelectronics Engineering Laboratory Toshiba Corp.
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KOIKE Mitsuo
R&D Center, Toshiba Corporation
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SATO Tsutomu
Microelectronics Engineering Laboratory, Toshiba Corporation
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Miyano Kiyotaka
Microelectronics Engineering Laboratory Semiconductor Company Toshiba Corporation
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Sato Tsutomu
Microelectronics Engineering Laboratory Toshiba Corporation
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