Highly Uniform Deposition of LP-CVD 3i3N4 Films on Tungsten for Advanced Low Resistivity "Poly-Metal" Gate Interconnects
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概要
- 論文の詳細を見る
- 1998-09-07
著者
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Miyano K
Toshiba Corp. Yokohama Jpn
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NAKAJIMA Kazuaki
Microelectronics Engineering Labs., Toshiba Corporation
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SUGURO Kyoichi
Microelectronics Engineering Laboratory, Semiconductor Company, Toshiba Corporation
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AKASAKA Yasushi
Microelectronics Engineering Laboratory, Toshiba Corp.
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MIYANO Kiyotaka
Microelectronics Engineering Laboratory, Toshiba Corp.
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Nakajima Kensuke
Research Institute Of Electrical Communication Tohoku University
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Suguro K
Toshiba Corporation Semiconductor Company
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Yagishita A
Process And Manufacturing Engineering Center Semiconductor Company Toshiba Corporation
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Akasaka Yasushi
Microelectronics Engineering Laboratory Toshiba Corporation
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Miyano Kiyotaka
Microelectronics Engineering Laboratory Semiconductor Company Toshiba Corporation
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Nakajima Kazuaki
Microelectronics Engineering Labs. Toshiba Corporation
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Suguro Kyoichi
Toshiba Corporation Semiconductor Company
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