Suppression of Gate Leakage and Enhancement of Breakdown Voltage Using Thermally Oxidized Al Layer as Gate Dielectric for AlGaN/GaN Metal--Oxide--Semiconductor High-Electron-Mobility Transistors
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概要
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A synthetic route for alumina based dielectric layer for AlGaN/GaN metal--oxide--semiconductor high-electron-mobility transistors (MOS-HEMT) has been developed. The approach is based on oxidative annealing of thin Al layer deposited prior to Schottky gate metallization. The MOS-HEMT exhibits good pinch off features with $I_{\text{ds-max}}$ and $g_{\text{m-max}}$ of 421 mA/mm and 121 mS/mm, respectively. Frequency dependent conductance measurements yielded a minimum trap density ($D_{\text{T}}$) and trap transient time ($T_{\text{T}}$) of $2.2 \times 10^{12}$ cm-2 eV-1 and 1.3 μs, respectively. The oxide layer suppresses the gate leakage by two orders of magnitude and enhances the breakdown voltage ($\mathit{BV}$) of the devices. A high $\mathit{BV}$ of 431 V and figure of merit (FOM) of $1.89 \times 10^{8}$ V2 $\Omega^{-1}$ cm-2 for 15 μm device at ($L_{\text{gd}} \leq 4$ μm) was observed for Al2O3 based MOS-HEMT.
- 2011-04-25
著者
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Selvaraj S.
Research Center For Nano-device And System Nagoya Institute Of Technology
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Freedsman Joseph
Research Center For Nano-device And System Nagoya Institute Of Technology
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Kubo Toshiharu
Research Center For Integrated Quantum Electronics Hokkaido University
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Egawa Takashi
Research Center for Micro-Structure Devices, Nagoya Institute of Technology
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Selvaraj S.
Research Center for Nano-Device and System, Nagoya Institute of Technolgy, Nagoya 466-8555, Japan
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Freedsman Joseph
Research Center for Nano-Device and System, Nagoya Institute of Technolgy, Nagoya 466-8555, Japan
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