Improved Performance of 4H-SiC Double Reduced Surface Field Metal-Oxide-Semiconductor Field-Effect Transistors by Increasing RESURF Doses
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概要
- 論文の詳細を見る
- Japan Society of Applied Physicsの論文
- 2008-10-25
著者
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KIMOTO Tsunenobu
Department of Electronic Science and Engineering, Kyoto University
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SUDA Jun
Department of Electronic Science and Engineering, Kyoto University
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NOBORIO Masato
Department of Electronic Science and Engineering, Kyoto University
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Suda Jun
Department Of Electrical Engineering Kushiro National College Of Technology
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Kimoto Tsunenobu
Department Of Electrical Engineering Faculty Of Engineering Kyoto University
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Noborio Masato
Department Of Electronic Science And Engineering Kyoto University
関連論文
- A New Class of Step-and-Terrace Structure Observed on 4H-SiC(0001) after High-Temperature Gas Etching
- Elimination of the Major Deep Levels in n- and p-Type 4H-SiC by Two-Step Thermal Treatment
- Recent Progress in SiC Ion Implantation and MOS Technologies for High Power Devices
- High Channel Mobility in Inversion Layer of SiC MOSFETs for Power Switching Transistors
- High Channel Mobility in Inversion Layer of SiC MOSFETs for Power Switching Transistors
- Scanning Capacitance and Spreading Resistance Microscopy of SiC Multiple-pn-Junction Structure : Semiconductors
- High-Voltage 4H-SiC RESURF MOSFETs Processed by Oxide Deposition and N_2O Annealing
- Interface Properties of Metal-Oxide-Semiconductor Structures on 4H-SiC{0001} and (1120) Formed by N_2O Oxidation
- High-Temperature Deep Level Transient Spectroscopy on As-Grown P-Type 4H-SiC Epilayers
- Correspondence between Surface Morphological Faults and Crystallographic Defects in 4H-SiC Homoepitaxial Film