Fabrication Technologies for Double-SiO_2-Barrier Metal-Oxide-Semiconductor Transistor with a Poly-Si Dot
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概要
- 論文の詳細を見る
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2001-03-01
著者
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YOKOYAMA Shin
Research Center for Nanodevices and Systems, Hiroshima University
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Yokoyama Seiji
School Of Material Science Japan Advanced Institute Of Science And Technology
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Ito Yuhei
Research Center For Nanodevices And Systems Hiroshima University
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NAKAJIMA Anri
Research Center for Nanodevices and Systems, Hiroshima University
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Yokoyama Shin
Research Center For Integrated Systems Hiroshima University
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Yokoyama S
Research Center For Nanodevices And Systems Hiroshima University
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HATANO Tsuyoshi
Research Center for Nanodevices and Systems, Hiroshima University
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Nakajima A
Research Center For Nanodevices And Systems Hiroshima University
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Nakajima Anri
Research Center For Nanodevices And Systems Hiroshima University
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Nomura Akihiro
Research Center For Nanodevices And Systems Hiroshima University
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Hatano T
Research Center For Nanodevices And Systems Hiroshima University
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Hatano Tsuyoshi
Research Center For Nanodevices And Systems Hiroshima University
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Yokoyama S
Kyushu Univ. Fukuoka Jpn
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