An Approach for Reducing Leakage Current Variation due to Manufacturing Variability
スポンサーリンク
概要
- 論文の詳細を見る
Leakage current is an important qualitative metric of LSI (Large Scale Integrated circuit). In this paper, we focus on reduction of leakage current variation under the process variation. Firstly, we derive a set of quadratic equations to evaluate delay and leakage current under the process variation. Using these equations, we discuss the cases of varying leakage current without degrading delay distribution and propose a procedure to reduce the leakage current variations. From the experiments, we show the proposed method effectively reduces the leakage current variation up to 50% at 90 percentile point of the distribution compared with the conventional design approach.
- (社)電子情報通信学会の論文
- 2009-12-01
著者
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KANAMOTO Toshiki
Renesas Technology Corporation
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HASHIMOTO Masanori
Osaka University
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SATO Takashi
Kyoto University
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Sakata Tsuyoshi
Fujitsu Microelectronics Ltd.
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KUROKAWA Atsushi
Sanyo Semiconductor Co. Ltd.
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Tanaka Masakazu
Panasonic Corp.
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Sato T
Photonic Lattice Inc.:niche Tohoku University
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Masuda Hiroo
Renesas Technol. Corp. Kodaira‐shi Jpn
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Masuda Hiroo
Renesas Technology Corp.
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OKUMURA Takaaki
Semiconductor Technology Academic Research Center
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FURUKAWA Katsuhiro
Jedat Inc.
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TAKAFUJI Hiroshi
RICOH Company Ltd.
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HACHIYA Koutaro
Jedat Inc.
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NAKASHIMA Hidenari
NEC Electronics Corp.
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Hachiya Kotaro
Jedat Inc.
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Kurokawa Atsushi
Sanyo Electric Co. Ltd.
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Hashimoto Masanori
Osaka Univ. Suita‐shi Jpn
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Kanamoto Toshiki
Mirai‐selete Sagamihara‐shi Jpn
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Kanamoto Toshiki
Renesas Technology Corp.
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Kanamoto Toshiki
Renesas Design Corp.
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Nakashima Hidenari
Integrated Research Institute Tokyo Institute Of Technology
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Kurokawa Atsushi
Sanyo Electric Co. Ltd
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Sato Takashi
Institute Of Physics And Tsukuba Research Center For Interdisciplinary Materials Science University
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Hashimoto Masanori
Osaka Univ.
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Okumura Takaaki
Semiconductor Technol. Academic Res. Center
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Masuda Hiroo
Renesas Electronics Corporation, Takasaki, Gunma 370-0021, Japan
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