Masuda Hiroo | Renesas Technol. Corp. Kodaira‐shi Jpn
スポンサーリンク
概要
関連著者
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Masuda Hiroo
Renesas Technol. Corp. Kodaira‐shi Jpn
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Masuda Hiroo
Renesas Electronics Corporation, Takasaki, Gunma 370-0021, Japan
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KANAMOTO Toshiki
Renesas Technology Corporation
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Masuda Hiroo
Renesas Technology Corp.
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Kanamoto Toshiki
Renesas Design Corp.
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HASHIMOTO Masanori
Osaka University
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SATO Takashi
Kyoto University
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Sakata Tsuyoshi
Fujitsu Microelectronics Ltd.
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KUROKAWA Atsushi
Sanyo Semiconductor Co. Ltd.
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Sato T
Photonic Lattice Inc.:niche Tohoku University
著作論文
- Design Guidelines and Process Quality Improvement for Treatment of Device Variations in an LSI Chip(Microelectronic Test Structures)
- Impact of Self-Heating in Wire Interconnection on Timing
- An Approach for Reducing Leakage Current Variation due to Manufacturing Variability
- Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations
- Comprehensive Matching Characterization of Analog CMOS Circuits
- Concise Modeling of Transistor Variations in an LSI Chip and Its Application to SRAM Cell Sensitivity Analysis
- A Novel Expression of Spatial Correlation by a Random Curved Surface Model and Its Application to LSI Design
- A New LDMOS Transistor Macro-Modeling for Accurately Predicting Bias Dependence of Gate-Overlap Capacitance