A Parallel Method to Extract Critical Areas of Net Pairs for Diagnosing Bridge Faults
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概要
- 論文の詳細を見る
This paper proposes a new parallel method of producing the adjacent net pair list from the LSI layouts, which is run on workstations connected with the network. The pair list contains pairs of adjacent nets and the probability of a bridging fault between them, and is used in fault diagnosis of LSIs. The proposed method partitions into regions each mask layer of the LSI layout, produces a pair list corresponding to each region in parallel and merges them into the entire pair list. It yields the accurate results, because it considers the faults between two wires containing different adjacent regions. The experimental results show that the proposed method has greatly reduced the processing time from more than 60hrs. to 3hrs. in case of 42M-gate LSIs.
- 2008-12-01
著者
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KANAMOTO Toshiki
Renesas Technology Corporation
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Sawada Shigeo
Renesas Design Corp.
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Terai Masayuki
Department Of Informatics Osaka Gakuin University
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Terai Masayuki
Department Of Applied Physics Waseda University
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SUEMITSU Keiichi
Renesas Design Corp.
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ITO Toshiaki
Renesas Design Corp.
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KOTANI Satoshi
Renesas Design Corp.
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Kanamoto Toshiki
Renesas Design Corp.
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