特異場理論を応用した半導体デバイス無転位設計手法の検討

概要

論文の詳細を見る
During fabrication of semiconductor devices, the stresses on a silicon substrate sometimes cause dislocations and worsen the electric characteristics of the device. Therefore, a dislocation-free fabrication process needs to be developed to improve reliability. In this paper, a process design method using stress singularity parameters (K and λ) is proposed. In order to prevent the dislocation generation, the process parameters, such as the device structure, materials and process temperatures, are set to keep the stress singularity parameters (K and λ) under the critical values of dislocation generation K_dc. These parameters are predicted using FEM method considering the internal stress of thin films. The process design was applied to a bipolar transistor and a MOS transistor and the experimental results agreed very well with the prediction. It was confirmed that this new process design method is effective in improving device reliabirity.
社団法人日本材料学会の論文
2001-03-15