Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions
スポンサーリンク
概要
- 論文の詳細を見る
- Japan Society of Applied Physicsの論文
- 2008-09-25
著者
-
HANYU Takahiro
Research Institute of Electrical Communication, Tohoku University
-
IKEDA Shoji
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
-
HASEGAWA Haruhiro
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
-
OHNO Hideo
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
-
MIURA Katsuya
Hitachi Advanced Research Laboratory
-
HAYAKAWA Jun
Hitachi Advanced Research Laboratory
-
ENDOH Tetsuo
Center for Interdisciplinary Research, Tohoku University
-
Endoh Tetsuo
Center For Interdisciplinary Research Tohoku University
-
Ohno Hideo
Tohoku Univ. Sendai Jpn
-
Ohno Hideo
Laboratory For Electronic Intelligent Systems
-
Endoh Testuo
Center For Interdisciplinary Research Tohoku University
-
Hasegawa Haruhiro
Riec Tohoku University
-
Endoh Tetsuo
Tohoku Univ. Sendai‐shi Jpn
-
Hanyu Takahiro
Riec Tohoku University
-
Hanyu Takahiro
Research Institute Of Electrical Communication Tohoku University
-
MATSUNAGA Shoun
Research Institute of Electrical Communication, Tohoku University
-
Mizunuma Kotaro
Hitachi Advanced Research Laboratory
-
Matsunaga Shoun
Laboratory For Brainware Systems Research Institute Of Electrical Communication Tohoku University
-
Ikeda Shoji
Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
関連論文
- Highly Reliable Multiple-Valued One-Phase Signalling for an Asynchronous On-Chip Communication Link
- Impact of floating body type DRAM with the vertical MOSFET (Silicon devices and materials)
- Impact of floating body type DRAM with the vertical MOSFET (Electron devices)
- Study on impurity distribution dependence of electron-dynamics in vertical MOSFET (Silicon devices and materials)
- Evaluation of 1/f noise characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET (Electron devices)
- Study on impurity distribution dependence of electron-dynamics in vertical MOSFET (Electron devices)
- Advanced magnetic tunnel junctions for hybrid spintronics/CMOS circuits
- Transient Characteristic of Fabricated Magnetic Tunnel Junction (MTJ) Programmed with CMOS Circuit
- Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
- Study on Quantum Electro-Dynamics in Vertical MOSFET
- Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET(Session 7A : Gate Oxides)
- The Analysis of Temperature Dependency of the Mobility In High-k/Metal Gate MOSFET and the Performance on its CMOS Inverter(Session 7A : Gate Oxides)
- The optimum physical targets of the 3-dimensional vertical FG NAND flash memory cell arrays with the extended sidewall control gate (ESCG) structure.(Session 8A : Memory 2)
- The optimum physical targets of the 3-dimensional vertical FG NAND flash memory cell arrays with the extended sidewall control gate (ESCG) structure.(Session 8A : Memory 2)
- Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation(Session 7B : Si IC and Circuit Technology)
- The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation(Session 7B : Si IC and Circuit Technology)
- The Analysis of Temperature Dependency of the Mobility In High-k/Metal Gate MOSFET and the Performance on its CMOS Inverter(Session 7A : Gate Oxides)
- Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation(Session 7B : Si IC and Circuit Technology)
- The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation(Session 7B : Si IC and Circuit Technology)
- Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor(Session 9B : Nano-Scale devices and Physics)
- Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET(Session 7A : Gate Oxides)
- Impact of Floating Body type DRAM with the Vertical MOSFET(Session 8A : Memory 2)
- Impact of Floating Body type DRAM with the Vertical MOSFET(Session 8A : Memory 2)
- Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET(Session 9B : Nano-Scale devices and Physics)
- Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET(Session 9B : Nano-Scale devices and Physics)
- Over 1GHz High-Speed Current Pulse Generation Circuit for Novel Nonvolatile Memory Cells(Session 7B : Si IC and Circuit Technology)
- Over 1GHz High-Speed Current Pulse Generation Circuit for Novel Nonvolatile Memory Cells(Session 7B : Si IC and Circuit Technology)
- Spin Polarization Dependent Far Infrared Absorption in Ga_Mn_xAs : Semiconductors
- Fabrication and Evaluation of Magnetic Tunnel Junction with MgO Tunneling Barrier
- Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor(Session 9B : Nano-Scale devices and Physics)
- Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot
- Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot
- Semiconductor Spin Electronics
- A Spin Esaki Diode
- Carrier Mobility Dependence of Electron Spin Relaxation in GaAs Quantum Wells
- Photoluminescence Study of InAs Quantum Dots and Quantum Dashes Grown on GaAs(211)B
- Photoluminescence Study of InAs Quantum Dots and Quantum Dashes Grown on GaAs (211)B
- (Ga, Mn)As /GaAs Diluted Magnetic Semiconductor Superlattice Structures Prepared by Molecular Beam Epitaxy
- Advanced magnetic tunnel junctions for hybrid spintronics/CMOS circuits
- Giant TMR in CoFeB/MgO/CoFeB Magnetic Tunnel Junctions
- Current-Induced Magnetization Switching in MgO Barrier Based Magnetic Tunnel Junctions with CoFeB/Ru/CoFeB Synthetic Ferrimagnetic Free Layer
- Dependence of Tunnel Magnetoresistance in MgO Based Magnetic Tunnel Junctions on Ar Pressure during MgO Sputtering
- Dependence of Giant Tunnel Magnetoresistance of Sputtered CoFeB/MgO/CoFeB Magnetic Tunnel Junctions on MgO Barrier Thickness and Annealing Temperature
- Power-Aware Asynchronous Peer-to-Peer Duplex Communication System Based on Multiple-Valued One-Phase Signaling
- High-Throughput Bit-Serial LDPC Decoder LSI Based on Multiple-Valued Asynchronous Interleaving
- Study on Quantum Electro-Dynamics in Vertical MOSFET
- Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot
- Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
- Design of 30nm FinFETs and Double Gate MOSFETs with Halo Structure
- Design of 30nm FinFET with Halo Structure
- Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
- Design of 30nm FinFET with Halo Structure
- Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
- Scalability of Vertical MOSFETs in Sub-10nm generation and its Mechanism(Session5A: Si Devices II)
- Blue Light-Emitting Diode Based on ZnO
- Future High Density Memory with Vertical Structured Device Technology
- Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuits
- Transient Characteristic of Fabricated Magnetic Tunnel Junction (MTJ) Programmed with CMOS Circuit
- Novel Concept Dynamic Feedback MCML Technique for High-Speed and High-Gain MCML type D-Flip Flop(Session8A: Si Devices III)
- Novel Concept Dynamic Feedback MCML Technique for High-Speed and High-Gain MCML type D-Flip Flop(Session8A: Si Devices III)
- Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor(Session5A: Si Devices II)
- Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor(Session5A: Si Devices II)
- Impact of 180nm Current Controlled MCML for Realizing Stable Circuit Operations under Threshold Voltage Fluctuations(Session8A: Si Devices III)
- Impact of 180nm Current Controlled MCML for Realizing Stable Circuit Operations under Threshold Voltage Fluctuations(Session8A: Si Devices III)
- Scalability of Vertical MOSFETs in Sub-10nm generation and its Mechanism(Session5A: Si Devices II)
- Design and Evaluation of a 54×54-bit Multiplier Based on Differential-Pair Circuitry(Digital,Low-Power, High-Speed LSIs and Related Technologies)
- Design of a Low-Power Quaternary Flip-Flop Based on Dynamic Differential Logic(Novel Device Architectures and System Integration Technologies)
- TMR-Based Logic-in-Memory Circuit for Low-Power VLSI(Papers Selected from ITC-CSCC 2004)
- Dynamically Function-Programmable Bus Architecture for High-Throughput Intra-Chip Data Transfer(New System Paradigms for Integrated Electronics)
- Low-Power Motion-Vector Detection VLSI Processor Based on Pass-Gate Logic with Dynamic Supply-Voltage/Clock-Frequency Scaling(New System Paradigms for Integrated Electronics)
- Low-Power Multiple-Valued Current-Mode Logic Using Substrate Bias Control(Low-Power System LSI, IP and Related Technologies)
- Design and Evaluation of a NULL-Convention Circuit Based on Dual-Rail Current-Mode Differential Logic(Novel Device Architectures and System Integration Technologies)
- Bias Voltage Dependence of Tunnel Magnetoresistance Effect in Spin-Valve Type MnIr/NiFe/Co_Fe_/SrTiO_3/La_Sr_MnO_3 Tunnel Junctions
- Fabrication of Silicon Pillar with 25 nm Half Pitch Using New Multiple Double Patterning Technique
- Pd Layer Thickness Dependence of Tunnel Magnetoresistance Properties in CoFeB/MgO-Based Magnetic Tunnel Junctions with Perpendicular Anisotropy CoFe/Pd Multilayers
- Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices
- Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions
- Enhancing Single-Ion Detection Efficiency by Applying Substrate Bias Voltage for Deterministic Single-Ion Doping
- Temperature Dependence of Electron Tunneling between Two Dimensional Electron Gas and Si Quantum Dots
- CoFeB Inserted Perpendicular Magnetic Tunnel Junctions with CoFe/Pd Multilayers for High Tunnel Magnetoresistance Ratio
- Collective Tunneling Model in Charge-Trap-Type Nonvolatile Memory Cell
- Effects of Silicon Source Gas and Substrate Bias on the Film Properties of Si-Incorporated Diamond-Like Carbon by Radio-Frequency Plasma-Enhanced Chemical Vapor Deposition
- Epitaxial Growth of GaN Films by Pulse-Mode Hot-Mesh Chemical Vapor Deposition
- Current Controlled MOS Current Mode Logic with Auto-detection of Threshold Voltage Fluctuation
- Current Controlled MOS Current Mode Logic with Auto-detection of Threshold Voltage Fluctuation
- Study on Quantum Electro-Dynamics in Vertical MOSFET
- The Performance of Magnetic Tunnel Junction Integrated on the Back-End Metal Line of Complimentary Metal–Oxide–Semiconductor Circuits
- Temperature Dependency of Driving Current in High-k/Metal Gate MOSFET and Its Influence on CMOS Inverter Circuit
- Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET with 65nm CMOS Process
- The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-Speed Operation
- Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor
- Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation
- Dependence of Magnetic Anisotropy in CoFeB Free Layers on Capping Layers in MgO-Based Magnetic Tunnel Junctions with In-Plane Easy Axis
- Dependence of Magnetic Anisotropy in Co_Fe_B_ Free Layers on Capping Layers in MgO-Based Magnetic Tunnel Junctions with In-Plane Easy Axis
- Low Power Nonvolatile Counter Unit with Fine-Grained Power Gating
- Design and Fabrication of a One-Transistor/One-Resistor Nonvolatile Binary Content-Addressable Memory Using Perpendicular Magnetic Tunnel Junction Devices with a Fine-Grained Power-Gating Scheme
- Current-Driven Magnetization Switching in CoFeB/MgO/CoFeB Magnetic Tunnel Junctions
- Fabrication and Evaluation of Magnetic Tunnel Junction with MgO Tunneling Barrier
- Open-Fault Resilient Multiple-Valued Codes for Reliable Asynchronous Global Communication Links
- Special Section on Novel Device Architectures and System Integration Technologies