Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices
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概要
- 論文の詳細を見る
- Japan Society of Applied Physicsの論文
- 2009-02-25
著者
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IKEDA Shoji
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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HASEGAWA Haruhiro
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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OHNO Hideo
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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MIURA Katsuya
Hitachi Advanced Research Laboratory
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HAYAKAWA Jun
Hitachi Advanced Research Laboratory
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ENDOH Tetsuo
Center for Interdisciplinary Research, Tohoku University
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Endoh Tetsuo
Center For Interdisciplinary Research Tohoku University
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Ohno Hideo
Tohoku Univ. Sendai Jpn
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Ohno Hideo
Laboratory For Electronic Intelligent Systems
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Miura Katsuya
Laboratory For Nanoelectronics And Spintronics Research Institute Of Electrical Communication Tohoku
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Endoh Testuo
Center For Interdisciplinary Research Tohoku University
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Hasegawa Haruhiro
Riec Tohoku University
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Endoh Tetsuo
Tohoku Univ. Sendai‐shi Jpn
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Hanyu Takahiro
Riec Tohoku University
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MATSUNAGA Shoun
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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HIYAMA Kimiyuki
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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MATSUMOTO Atsushi
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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HANYU Takahiro
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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Mizunuma Kotaro
Hitachi Advanced Research Laboratory
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Matsunaga Shoun
Laboratory For Brainware Systems Research Institute Of Electrical Communication Tohoku University
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Hiyama Kimiyuki
Laboratory For Brainware Systems Research Institute Of Electrical Communication Tohoku University
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Ikeda Shoji
Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
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