Hanyu Takahiro | Riec Tohoku University
スポンサーリンク
概要
関連著者
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Hanyu Takahiro
Riec Tohoku University
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HAYAKAWA Jun
Hitachi Advanced Research Laboratory
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HANYU Takahiro
RIEC, Tohoku University
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Ohno Hideo
Tohoku Univ. Sendai Jpn
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HANYU Takahiro
Research Institute of Electrical Communication, Tohoku University
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MIURA Katsuya
Hitachi Advanced Research Laboratory
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ENDOH Tetsuo
Center for Interdisciplinary Research, Tohoku University
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Endoh Testuo
Center For Interdisciplinary Research Tohoku University
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Hasegawa Haruhiro
Riec Tohoku University
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Endoh Tetsuo
Tohoku Univ. Sendai‐shi Jpn
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Hanyu Takahiro
Research Institute Of Electrical Communication Tohoku University
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Mizunuma Kotaro
Hitachi Advanced Research Laboratory
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IKEDA Shoji
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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OHNO Hideo
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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Ohno Hideo
Laboratory For Electronic Intelligent Systems
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望月 明
Research Institute Of Electrical Communication Tohoku University
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MOCHIZUKI Akira
Research Institute of Electrical Communication, Tohoku University
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Mochizuki Akira
The Research Institute Of Electrical Communication Tohoku University
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HASEGAWA Haruhiro
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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小柳 光正
東北大院工
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KAMIYANAGI Masashi
CIR, Tohoku University
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IGA Fumitaka
CIR, Tohoku University
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IKEDA Shoji
RIEC, Tohoku University
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HASEGAWA Haruhiro
RIEC, Tohoku University
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OHNO Hideo
RIEC, Tohoku University
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ENDOH Tetsuo
CIR, Tohoku University
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Endoh Tetsuo
Center For Interdisciplinary Research Tohoku University
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Iga Fumitaka
Cir Tohoku University
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Koyanagi Mitsumasa
Cir Tohoku University
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SHIRAHAMA Hirokatsu
Research Institute of Electrical Communication, Tohoku University
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Matsunaga Shoun
Laboratory For Brainware Systems Research Institute Of Electrical Communication Tohoku University
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Kamiyanagi Masashi
Center For Interdisciplinary Research Tohoku University
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Shirahama Hirokatsu
Research Institute Of Electrical Communication Tohoku University
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Ikeda Shoji
Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
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MATSUKURA Fumihiro
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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Miura Katsuya
Laboratory For Nanoelectronics And Spintronics Research Institute Of Electrical Communication Tohoku
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Matsukura Fumihiro
Laboratory For Nanoelectronics And Spintronics Riec Tohoku University
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Matsukura Fumihiro
Laboratory For Electronic Intelligent Systems Research Institute Of Electrical Communication Tohoku
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TAKAHASHI Hiromasa
Hitachi, Ltd., Advanced Research Laboratory
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KIMURA Hiromitsu
Semiconductor Research and Development Headquarters, Rohm Co., Ltd.
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IBUKI Mitsuru
Research Institute of Electrical Communication, Tohoku University
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Ibuki Mitsuru
Research Institute Of Electrical Communication Tohoku University
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MATSUNAGA Shoun
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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HIYAMA Kimiyuki
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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MATSUMOTO Atsushi
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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HANYU Takahiro
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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MATSUNAGA Shoun
Research Institute of Electrical Communication, Tohoku University
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Hiyama Kimiyuki
Laboratory For Brainware Systems Research Institute Of Electrical Communication Tohoku University
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Takahashi Hiromasa
Hitachi Ltd. Advanced Research Laboratory
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Kimura Hiromitsu
Semiconductor Research And Development Headquarters Rohm Co. Ltd.
著作論文
- Dependence of Giant Tunnel Magnetoresistance of Sputtered CoFeB/MgO/CoFeB Magnetic Tunnel Junctions on MgO Barrier Thickness and Annealing Temperature
- Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuits
- Transient Characteristic of Fabricated Magnetic Tunnel Junction (MTJ) Programmed with CMOS Circuit
- Design and Evaluation of a 54×54-bit Multiplier Based on Differential-Pair Circuitry(Digital,Low-Power, High-Speed LSIs and Related Technologies)
- Design of a Low-Power Quaternary Flip-Flop Based on Dynamic Differential Logic(Novel Device Architectures and System Integration Technologies)
- TMR-Based Logic-in-Memory Circuit for Low-Power VLSI(Papers Selected from ITC-CSCC 2004)
- Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices
- Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions