Temperature Dependence of Electron Tunneling between Two Dimensional Electron Gas and Si Quantum Dots

スポンサーリンク

概要

• 論文の詳細を見る

• Quantum mechanical electron tunneling has potential applications in both science and technology, such as flash memories in modern LSI technologies and electron transport chains in biosystems. Although it is known that one-dimensional quantum electron tunneling lacks temperature dependence, the behavior of electron tunneling between different dimensional systems is still an open question. Here, we investigated the electron tunneling between a two-dimensional electron gas (2DEG) and zero-dimensional Si quantum dots and discovered an unexpected temperature dependence: At high temperature, the gate voltage necessary for electron injection from 2DEG to Si quantum dots becomes markedly small. This unusual tunneling behavior was phenomenologically explained by considering the geometrical matching of wave functions between different dimensional systems. We assumed that electron tunneling would occur within a finite experimental measurement time. Then, the observed electron tunneling is explained only by the contributions of wave packets below the quantum dot with a finite lifetime rather than the ordinary thermal excited states of 2DEG.

• 2010-01-25

著者

• Sakurai Yoko

  Graduate School Of Pure And Applied Science University Of Tsukuba

• Endoh Tetsuo

  Center For Interdisciplinary Research Tohoku University

• Nomura Shintaro

  Graduate School Of Pure And Applied Science University Of Tsukuba

• SAITO Shin-ichi

  Central Research Laboratory, Hitachi, Ltd.

• Miyazaki Seiichi

  Graduate School Of Advanced Sciences And Matters Hiroshima University

• Ikeda Mitsuhisa

  Graduate School Of Advanced Sciences Of Matter Hiroshima University

• Shigeta Yasuteru

  Institute For Picobiology Graduate School Of Life Science Univ Of Hyogo

• Iwata Jun-ichi

  Center For Computational Science University Of Tsukuba

• Muraguchi Masakazu

  Center For Interdisciplinary Research Tohoku University

• Shiraishi Kenji

  Graduate School Of Applied Physics Univ Of Tsukuba

• Takada Yukihiro

  Graduate School Of Pure And Applied Science University Of Tsukuba

• Makihara Katsunori

  Graduate School of Advanced Science and Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan

• Endoh Tetsuo

  Center for Interdisciplinary Research, Tohoku University, Sendai 980-8578, Japan

• Shigeta Yasuteru

  Institute of Picobiology, Graduate School of Life Science, University of Hyogo, Kamigori, Hyogo 678-1297, Japan

• Sakurai Yoko

  Graduate School of Pure and Applied Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8571, Japan

• Iwata Jun-ichi

  Center for Computational Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8577, Japan

• Ikeda Mitsuhisa

  Graduate School of Advanced Science and Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan

• Takada Yukihiro

  Graduate School of Pure and Applied Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8571, Japan

• Nomura Shintaro

  Graduate School of Pure and Applied Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8571, Japan

• Miyazaki Seiichi

  Graduate School of Advanced Science and Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan

関連論文

• Temperature Dependence of Electron Tunneling between Two Dimensional Electron Gas and Si Quantum Dots
• Formation of Pd Nanodots Induced by Remote Hydrogen Plasma and Its Application to Floating Gate MOS Memories(Session4A: Nonvolatile Memory)
• Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET(Session 7A : Gate Oxides)
• The Analysis of Temperature Dependency of the Mobility In High-k/Metal Gate MOSFET and the Performance on its CMOS Inverter(Session 7A : Gate Oxides)
• The optimum physical targets of the 3-dimensional vertical FG NAND flash memory cell arrays with the extended sidewall control gate (ESCG) structure.(Session 8A : Memory 2)
• The optimum physical targets of the 3-dimensional vertical FG NAND flash memory cell arrays with the extended sidewall control gate (ESCG) structure.(Session 8A : Memory 2)
• Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation(Session 7B : Si IC and Circuit Technology)
• The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation(Session 7B : Si IC and Circuit Technology)
• The Analysis of Temperature Dependency of the Mobility In High-k/Metal Gate MOSFET and the Performance on its CMOS Inverter(Session 7A : Gate Oxides)
• Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation(Session 7B : Si IC and Circuit Technology)
• The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation(Session 7B : Si IC and Circuit Technology)
• Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor(Session 9B : Nano-Scale devices and Physics)
• Characterization of Mg Diffusion into HfO_2/SiO_2/Si(100) Stacked Structures and Its Impact on Detect State Densities(Session 7A : Gate Oxides)
• The Impact of H_2 Anneal on Resistive Switching in Pt/TiO_2/Pt Structure(Session 2A : Memory 1)
• Characterization of Mg Diffusion into HfO_2/SiO_2/Si(100) Stacked Structures and Its Impact on Detect State Densities(Session 7A : Gate Oxides)
• The Impact of H_2 Anneal on Resistive Switching in Pt/TiO_2/Pt Structure(Session 2A : Memory 1)
• Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET(Session 7A : Gate Oxides)
• Impact of Floating Body type DRAM with the Vertical MOSFET(Session 8A : Memory 2)
• Impact of Floating Body type DRAM with the Vertical MOSFET(Session 8A : Memory 2)
• Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET(Session 9B : Nano-Scale devices and Physics)
• Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET(Session 9B : Nano-Scale devices and Physics)
• Over 1GHz High-Speed Current Pulse Generation Circuit for Novel Nonvolatile Memory Cells(Session 7B : Si IC and Circuit Technology)
• Over 1GHz High-Speed Current Pulse Generation Circuit for Novel Nonvolatile Memory Cells(Session 7B : Si IC and Circuit Technology)
• In-situ Measurement of Temperature Variation in Si Wafer During Millisecond Rapid Thermal Annealing Induced by Thermal Plasma Jet Irradiation
• Evaluation of Dielectric Reliability of Ultrathin HfSiO_xN_y in Metal-Gate Capacitors(Ultra-Thin Gate Insulators,Fundamentals and Applications of Advanced Semiconductor Devices)
• Melting and Solidification of Microcrystalline Si Films Induced by Semiconductor Diode Laser Irradiation
• Characterization of Germanium Nanocrystallites Grown on SiO_2 by a Conductive AFM Probe Technique(Nanomaterials and Quantum-Effect Devices, Fundamental and Application of Advanced Semiconductor Devices)
• Characterization of Atom Diffusion in Polycrystalline Si/SiGe/Si Stacked Gate(Si Devices and Processes, Fundamental and Application of Advanced Semiconductor Devices)
• Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor(Session 9B : Nano-Scale devices and Physics)
• Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot
• Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot
• Theoretical Study of the Time-Dependent Phenomena on a Two-Dimensional Electron Gas Weakly Coupled with a Discrete Level
• Charging and Discharging Characteristics of Stacked Floating Gates of Silicon Quantum Dots(Nanomaterials and Quantum-Effect Devices, Fundamental and Application of Advanced Semiconductor Devices)
• Carrier Depletion Effect in the n^+Poly-Si Gate Side-Wall/SiO_2 Interfaces as Evaluated by Gate Tunnel Leakage Current : Semiconductors
• Experimental Evidence of Carrier Depletion Effect near n^+Poly-Si Gate Side
• Experimental Evidence of Carrier Depletion Effect near n^+Poly-Si Gate Side Wall/SiO_2 Interfaces for Sub-100nm nMOSFETs
• Charging States of Si Quantum Dots as Detected by AFM/Kelvin Probe Technique
• Comprehensive Understanding of PBTI and NBTI reliability of High-k / Metal Gate Stacks with EOT Scaling to sub-1nm
• Mechanism of Threshold Voltage Reduction and Hole Mobility Enhancement in pMOSFETs Employing Sub-1nm EOT HfSiON by Use of Substrate Fluorine Ion Implantation
• Study on Quantum Electro-Dynamics in Vertical MOSFET
• Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot
• Random Telegraph Signals in Two-Dimensional Array of Si Quantum Dots
• Random Telegraph Signals in Two-Dimensional Array of Si Quantum Dots
• Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
• Design of 30nm FinFETs and Double Gate MOSFETs with Halo Structure
• Design of 30nm FinFET with Halo Structure
• Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
• Design of 30nm FinFET with Halo Structure
• Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
• Scalability of Vertical MOSFETs in Sub-10nm generation and its Mechanism(Session5A: Si Devices II)
• Future High Density Memory with Vertical Structured Device Technology
• Electro-Luminescence from Ultra-Thin Silicon
• Inversion Electron Mobility Affected by Phase Separation in High-Permittivity Gate Dielectrics
• Novel Concept Dynamic Feedback MCML Technique for High-Speed and High-Gain MCML type D-Flip Flop(Session8A: Si Devices III)
• Novel Concept Dynamic Feedback MCML Technique for High-Speed and High-Gain MCML type D-Flip Flop(Session8A: Si Devices III)
• Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor(Session5A: Si Devices II)
• Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor(Session5A: Si Devices II)
• Impact of 180nm Current Controlled MCML for Realizing Stable Circuit Operations under Threshold Voltage Fluctuations(Session8A: Si Devices III)
• Impact of 180nm Current Controlled MCML for Realizing Stable Circuit Operations under Threshold Voltage Fluctuations(Session8A: Si Devices III)
• Scalability of Vertical MOSFETs in Sub-10nm generation and its Mechanism(Session5A: Si Devices II)
• Collective tunneling model in charge-trap-type nonvolatile memory cell (Special issue: Solid state devices and materials)
• Fabrication of Silicon Pillar with 25 nm Half Pitch Using New Multiple Double Patterning Technique
• Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices
• Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions
• Enhancing Single-Ion Detection Efficiency by Applying Substrate Bias Voltage for Deterministic Single-Ion Doping
• Temperature Dependence of Electron Tunneling between Two Dimensional Electron Gas and Si Quantum Dots
• Collective Tunneling Model in Charge-Trap-Type Nonvolatile Memory Cell
• Effects of Silicon Source Gas and Substrate Bias on the Film Properties of Si-Incorporated Diamond-Like Carbon by Radio-Frequency Plasma-Enhanced Chemical Vapor Deposition
• Synthesis of Assembled Nanocrystalline Si Dots Film by the Langmuir–Blodgett Technique
• Epitaxial Growth of GaN Films by Pulse-Mode Hot-Mesh Chemical Vapor Deposition
• Current Controlled MOS Current Mode Logic with Auto-detection of Threshold Voltage Fluctuation
• Current Controlled MOS Current Mode Logic with Auto-detection of Threshold Voltage Fluctuation
• Study on Quantum Electro-Dynamics in Vertical MOSFET
• The Performance of Magnetic Tunnel Junction Integrated on the Back-End Metal Line of Complimentary Metal–Oxide–Semiconductor Circuits
• Temperature Dependency of Driving Current in High-k/Metal Gate MOSFET and Its Influence on CMOS Inverter Circuit
• Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET
• Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET with 65nm CMOS Process
• The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-Speed Operation
• Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor
• Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation
• Theoretical Study of the Time-Dependent Phenomena on a Two-Dimensional Electron Gas Weakly Coupled with a Discrete Level
• Wave Packet Dynamics in the Spin Torque Transfer
• Study on Quantum Electro-Dynamics in Vertical MOSFET
• Fabrication Method of Sub-100 nm Metal-Oxide-Semiconductor Field-Effect Transistor with Thick Gate Oxide
• Disturb-Free Three-Dimensional Vertical Floating Gate NAND with Separated-Sidewall Control Gate
• Role of Synthetic Ferrimagnets in Magnetic Tunnel Junctions from Wave Packet Dynamics
• Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory
• Time-Resolved Switching Characteristic in Magnetic Tunnel Junction with Spin Transfer Torque Write Scheme
• Current Controlled MOS Current Mode Logic with Auto-Detection of Threshold Voltage Fluctuation
• Low Power Nonvolatile Counter Unit with Fine-Grained Power Gating
• A Schmitt Trigger Based SRAM with Vertical MOSFET
• High-Density and Low-Power Nonvolatile Static Random Access Memory Using Spin-Transfer-Torque Magnetic Tunnel Junction
• Source/Drain Engineering for High Performance Vertical MOSFET
• Multi-Electron Wave Packet Dynamics in Applied Electric Field
• Future High Density Memory with Vertical Structured Device Technology
• Design and Fabrication of a One-Transistor/One-Resistor Nonvolatile Binary Content-Addressable Memory Using Perpendicular Magnetic Tunnel Junction Devices with a Fine-Grained Power-Gating Scheme
• Inversion Electron Mobility Affected by Phase Separation in High-Permittivity Gate Dielectrics
• Low Frequency Noise Characterization in Metal Oxide Semiconductor Field Effect Transistor Based Charge Transfer Device at Room and Low Temperatures
• Influence of Coulomb Blockade on Wave Packet Dynamics in Nanoscale Structures
• Fabrication of a Magnetic Tunnel Junction-Based 240-Tile Nonvolatile Field-Programmable Gate Array Chip Skipping Wasted Write Operations for Greedy Power-Reduced Logic Applications

もっと見る 閉じる

スポンサーリンク