Carrier Depletion Effect in the n^+Poly-Si Gate Side-Wall/SiO_2 Interfaces as Evaluated by Gate Tunnel Leakage Current : Semiconductors

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概要

• 論文の詳細を見る
• 社団法人応用物理学会の論文
• 2002-05-01

著者

• MIYAZAKI Seiichi

  Hiroshima University

• MURAKAMI Hideki

  Department of Geology, Faculty of Science, Kochi University

• HIROSE Masataka

  Department of Electrical Engineering, Hiroshima University

• Miyazaki S

  Graduate School Of Advanced Sciences And Matters Hiroshima University

• Miyazaki Seiichi

  Department Of Electrical Engineering Hiroshima University

• Murakami Hideki

  Department Of Electrical Engineering Graduate School Of Advanced Sciences Of Matter Hiroshima Univer

• MIHARA Tatsuyoshi

  Department of Electrical Engineering, Graduate School of Advanced Sciences of Matter, Hiroshima Univ

• Mihara Tatsuyoshi

  Department Of Electrical Engineering Graduate School Of Advanced Sciences Of Matter Hiroshima Univer

• Miyazaki Seiichi

  Graduate School Of Advanced Sciences And Matters Hiroshima University

• Miyazaki Seiichi

  Department Of Electrical Engineering Graduate School Of Advanced Sciences And Matter Hiroshima Unive

• Hirose Masataka

  Department Of Electrical Engineering Graduate School Of Advanced Sciences Of Matter Hiroshima Univer

• Hirose Masataka

  Department Of Electrical Engineering Faculty Of Engineering Hiroshima University

• Miyazaki Seiichi

  Graduate School Of Engineering Nagoya University

• Miyazaki Seiichi

  Department of Electrical Engineering and Computer Science, Graduate School of Engineering, Nagoya University, Nagoya 464-8603, Japan

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