Disturb-Free Three-Dimensional Vertical Floating Gate NAND with Separated-Sidewall Control Gate
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概要
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Recently, the three-dimensional (3D) vertical floating gate (FG) type NAND cell arrays with the sidewall control gate (SCG) structure are receiving attention to overcome the reliability issues of charge trap (CT) type 3D NAND. In order to achieve the multilevel cell (MLC) operation for lower bit cost in 3D NAND, it is important to eliminate reliability issues, such as the V_{\text{th}} distribution with interference and disturbance problems and V_{\text{th}} shift with retention issues. In this paper, we intensively investigated the disturbance problems of the 3D vertical FG type NAND cell with separated-sidewall control gate (S-SCG) structure for the reliable MLC operation. Above all, we successfully demonstrate the fully suppressed disturbance problems, such as indirect programming of the unselected cells, hot electron injection of the edge cells and direct influence to the neighboring passing cells, by using the S-SCG with 30 nm pillar size.
- 2012-02-25
著者
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Endoh Tetsuo
Center For Interdisciplinary Research Tohoku University
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Seo Moon-sik
Center For Interdisciplinary Research Tohoku University
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Endoh Tetsuo
Center for Interdisciplinary Research, Tohoku University, Sendai 980-8578, Japan
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