Fabrication Method of Sub-100 nm Metal-Oxide-Semiconductor Field-Effect Transistor with Thick Gate Oxide

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概要

• 論文の詳細を見る

• Based on the standard large-scale integrated circuit (LSI) process, sub-100 nm gate metal–oxide–semiconductor field-effect transistor (MOSFET) with thick gate oxide was fabricated. This was realized only by the modification of layout design, and no customization of the fabrication process was necessary. This unique designing technique is of great use in obtaining low-input-leakage MOSFET by advanced LSI process for high-performance analog applications.

• 2010-12-25

著者

• Inokawa Hiroshi

  Research Institute Of Electronics Shizuoka Univ.

• Endoh Tetsuo

  Center For Interdisciplinary Research Tohoku University

• Singh Vipul

  Research Institute of Electronics, Shizuoka University, Hamamatsu 432-8011, Japan

• Endoh Tetsuo

  Center for Interdisciplinary Research, Tohoku University, Sendai 980-8578, Japan

• Satoh Hiroaki

  Research Institute of Electronics, Shizuoka University, Hamamatsu 432-8011, Japan

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