A Multiple-Valued Logic and Memory With Combined Single-Electron and Metal-Oxide-Semiconductor Transistors

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概要

• 論文の詳細を見る
• Institute of Electrical and Electronics Engineersの論文

著者

• Inokawa Hiroshi

  Research Institute Of Electronics Shizuoka Univ.

• TAKAHASHI Yasuo

  Graduate School of Information Science and Technology, Hokkaido University

• Takahashi Y

  Hokkaido Univ. Sapporo‐shi Jpn

• Inokawa H

  Research Institute Of Electronics Shizuoka Univ.

• Takahashi Y

  Ntt Basic Research Laboratories Ntt Cornoration

• Takahashi Y

  Osaka University

• Fujiwara Akira

  NTT Basic Research Laboratories, NTT Corporation

• Fujiwara A

  Ntt Basic Research Laboratories Ntt Corporation

• Fujiwara A

  Ntt Corp. Atsugi Jpn

• Takahashi Yasuo

  Graduate School Of Information Science And Technology Hokkaido Univ.

• Takahashi Y

  Graduate School Of Information Science And Technology Hokkaido Univ.

• Takahashi Yasuo

  The Tokyo Metropolitan Research Laboratory Of Public Health:graduate School Of Nutritional And Envir

• Takahashi Yasuo

  Faculty Of Pharmaceutical Sciences Tokyo University Of Science

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