A Simulation Methodology for Single-Electron Multiple-Valued Logics and Its Application to a Latched Parallel Counter
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概要
- 論文の詳細を見る
This paper introduces a methodology for simulating single-electron-transistor (SET)-based multiple-valued logics (MVLs). First, a physics-based analytical model for SET is described, and then a procedure for extracting parameters from measured characteristics is explained. After that, simulated and experimental results for basic MVL circuits are compared. As an advanced example of SET-based logics, a latched parallel counter, which is one of the most important components in arithmetic circuits, is newly designed and analyzed by a simulation. It is found that a SET-based 7-3 counter can be constructed with less than 1/10 the number of devices needed for a conventional circuit and can operate at a moderate speed with 1/100 the conventional power consumption.
- 社団法人電子情報通信学会の論文
- 2004-11-01
著者
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樋口 龍雄
東北工業大学工学部電子工学科
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HIGUCHI Tatsuo
Department of Electronics, Tohoku Institute of Technology
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Inokawa Hiroshi
Research Institute Of Electronics Shizuoka Univ.
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Inokawa Hiroshi
Ntt Basic Research Laboratories Ntt Corporation
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TAKAHASHI Yasuo
Graduate School of Information Science and Technology, Hokkaido University
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DEGAWA Katsuhiko
Graduate School of Information Sciences, Tohoku University
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AOKI Takafumi
Graduate School of Information Sciences, Tohoku University
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Takahashi Y
Hokkaido Univ. Sapporo‐shi Jpn
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Inokawa H
Research Institute Of Electronics Shizuoka Univ.
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Takahashi Y
Ntt Basic Research Laboratories Ntt Cornoration
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Takahashi Y
Osaka University
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Aoki T
The Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku
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Aoki Takafumi
Graduate School Of Information Sciences Tohoku University
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Aoki Takafumi
Graduate School Of Information Sciences Tohoku University:(present Address)presto Jst.
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Aoki Takafumi
The Department Of System Information Sciences Graduate School Of Information Sciences Tohoku Univers
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Higuchi Tatsuo
Tohoku Inst. Technol. Sendai‐shi Jpn
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Higuchi Tatsuo
Department Of Electronics Tohoku Institute Of Technology
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Higuchi Tatsuo
Department Of Electronic Engineering Tohoku Institute Of Technology
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Higuchi Tatsuo
The Department Of Electronics Faculty Of Engineering Tohoku Institute Of Technology
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Higuchi Tatsuo
Hitachi Ltd. Central Research Laboratory
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Takahashi Yasuo
Graduate School Of Information Science And Technology Hokkaido Univ.
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Takahashi Y
Graduate School Of Information Science And Technology Hokkaido Univ.
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Degawa Katsuhiko
Graduate School Of Information Sciences Tohoku University
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Takahashi Yasuo
The Tokyo Metropolitan Research Laboratory Of Public Health:graduate School Of Nutritional And Envir
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Takahashi Yasuo
Faculty Of Pharmaceutical Sciences Tokyo University Of Science
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Takahashi Yasuo
Graduate School of Engineering, Oita University
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