Takahashi Yasuo | Graduate School of Engineering, Oita University

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概要

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著作論文

A Single-Electron-Transistor Logic Gate Family for Binary, Multiple-Valued and Mixed-Mode Logic(New System Paradigms for Integrated Electronics)
A Simulation Methodology for Single-Electron Multiple-Valued Logics and Its Application to a Latched Parallel Counter
Fabrication of double-dot single-electron transistor in silicon nanowire
Fabrication of double-dot single-electron transistor in silicon nanowire
Transfer and Detection of Single Electrons Using Metal-Oxide-Semiconductor Field-Effect Transistors(Emerging Devices,Fundamentals and Applications of Advanced Semiconductor Devices)
Multifunctional Boolean Logic Using Single-Electron Transistors(New System Paradigms for Integrated Electronics)
Multifunctional device by using a quantum dot array
Use of finite element method for comparison of sound field diffuseness in reverberation rooms with and without absorption materials
In situ measurements of absorption characteristics using two microphones and environmental "anonymous" noise
Finite Element Sound Field Analysis of Diffuseness in Reverberation Rooms
Effect of Arrangement of Input Gates on Logic Switching Characteristics of Nanodot Array Device
The Observation of "Conduction Spot" on NiO Resistance Random Access Memory
In situ Conductance Measurement of a Limited Number of Nanoparticles during Transmission Electron Microscopy Observation
Back-Gate Effect on Coulomb Blockade in Silicon-on-Insulator Trench Wires
Tunnel Conductance through One or a Few Fe Particles Embedded in an MgO Matrix

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