Comprehensive Analysis of Positive and Negative Bias Temperature Instabilities in High-$k$/Metal Gate Stack Metal–Oxide–Silicon Field Effect Transistors with Equivalent Oxide Thickness Scaling to Sub-1 nm

スポンサーリンク

概要

• 論文の詳細を見る

• We have undertaken a comprehensive analysis of the positive bias temperature instability (PBTI) and negative bias temperature instability (NBTI) reliabilities of high-$k$/metal gate stacks. In the case of PBTI, electron traps constituted the main factor in drain current degradation resulting in an initial jump in threshold voltage shift due to fast transient electron traps, which depended only on stress voltage, because of the formation of positive oxygen vacancies near the cathode. However, in the case of NBTI, both interface state degradation (including interface hole traps) and hole traps in bulk HfSiON should be considered. We have clarified that the interface layer quality is related to not only the high transconductance but also the hole traps. The use of a high-quality interfacial layer, such as a wet oxide interface, represents a promising solution for the improvement of NBTI lifetime.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2008-04-25

著者

• Miyazaki Seiichi

  Hiroshima Univ.

• Inumiya Seiji

  Semiconductor Company Toshiba Corporation

• YAMADA Keisaku

  Waseda Univ.

• Ohji Yuzuru

  Semiconductor & Integrated Circuits Division Hitachi Ltd.

• Nara Yasuo

  Semiconductor Leading Edge Technologies Inc.

• Sato Motoyuki

  Semiconductor Leading Edge Technologies Inc. (selete)

• Aoyama Takayuki

  Semiconductor Leading Edge Technologies Inc.

• Hasunuma Ryu

  University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-0821, Japan

• Tamura Chihiro

  University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-8572, Japan

• Yamabe Kikuo

  University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-8572, Japan

• Shiraishi Kenji

  University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-8572, Japan

• Yamada Keisaku

  Waseda University, 513 Waseda Tsurumakicho, Shinjuku, Tokyo 162-0041, Japan

• Yamabe Kikuo

  University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-0821, Japan

• Aoyama Takayuki

  Semiconductor Leading Edge Technologies (Selete), Inc., Tsukuba, Ibaraki 305-8569, Japan

• Miyazaki Seiichi

  Hiroshima University, 1-3-1 Kagamiyama, Higashihiroshima, Hiroshima 739-8530, Japan

関連論文

• Formation of Pd Nanodots Induced by Remote Hydrogen Plasma and Its Application to Floating Gate MOS Memories(Session4A: Nonvolatile Memory)
• The Impact of H_2 Anneal on Resistive Switching in Pt/TiO_2/Pt Structure(Session 2A : Memory 1)
• Characterization of Mg Diffusion into HfO_2/SiO_2/Si(100) Stacked Structures and Its Impact on Detect State Densities(Session 7A : Gate Oxides)
• The Impact of H_2 Anneal on Resistive Switching in Pt/TiO_2/Pt Structure(Session 2A : Memory 1)
• In-situ Measurement of Temperature Variation in Si Wafer During Millisecond Rapid Thermal Annealing Induced by Thermal Plasma Jet Irradiation
• Evaluation of Dielectric Reliability of Ultrathin HfSiO_xN_y in Metal-Gate Capacitors(Ultra-Thin Gate Insulators,Fundamentals and Applications of Advanced Semiconductor Devices)
• Characterization of Germanium Nanocrystallites Grown on SiO_2 by a Conductive AFM Probe Technique(Nanomaterials and Quantum-Effect Devices, Fundamental and Application of Advanced Semiconductor Devices)
• Characterization of Atom Diffusion in Polycrystalline Si/SiGe/Si Stacked Gate(Si Devices and Processes, Fundamental and Application of Advanced Semiconductor Devices)
• Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor(Session 9B : Nano-Scale devices and Physics)
• High-resolution RBS analysis of Si-dielectrics interfaces
• Charging and Discharging Characteristics of Stacked Floating Gates of Silicon Quantum Dots(Nanomaterials and Quantum-Effect Devices, Fundamental and Application of Advanced Semiconductor Devices)
• Charging States of Si Quantum Dots as Detected by AFM/Kelvin Probe Technique
• Comprehensive Understanding of PBTI and NBTI reliability of High-k / Metal Gate Stacks with EOT Scaling to sub-1nm
• Hf and N Release from HfSiON in High-Temperature Annealing Induced by Oxygen Incorporation
• Mechanism of Threshold Voltage Reduction and Hole Mobility Enhancement in pMOSFETs Employing Sub-1nm EOT HfSiON by Use of Substrate Fluorine Ion Implantation
• Extendibility of High Mobility HfSiON Gate Dielectrics
• Random Telegraph Signals in Two-Dimensional Array of Si Quantum Dots
• Random Telegraph Signals in Two-Dimensional Array of Si Quantum Dots
• Random Telegraph Signals in Two-Dimensional Array of Si Quantum Dots
• Formation of Pd Nanodots Induced by Remote Hydrogen Plasma and Its Application to Floating Gate MOS Memories
• Electrical Properties of Highly Crystallized Ge : H Thin Films Grown from VHF Inductively-Coupled Plasma of H_2-diluted GeH_4(Session9A: Silicon Devices IV)
• Electrical Properties of Highly Crystallized Ge : H Thin Films Grown from VHF Inductively-Coupled Plasma of H_2-diluted GeH_4(Session9A: Silicon Devices IV)
• Formation of Pd Nanodots Induced by Remote Hydrogen Plasma and Its Application to Floating Gate MOS Memories(Session4A: Nonvolatile Memory)
• Progress on Charge Distribution in Multiply-Stacked Si Quantum Dots/SiO_2 Structure as Evaluated by AFM/KFM
• Evaluation of Electronic Defect States at Poly-Si/HfO_2 interface by Photoelectron Yield Spectroscopy
• Thermal Degradation of HfSiON Dielectrics Caused by TiN Gate Electrodes and Its Impact on Electrical Properties
• Oxygen Vacancy Induced Substantial Threshold Voltage Shifts in the Hf-based High-K MISFET with p+poly-Si Gates : A Theoretical Approach
• Properties of Ruthenium Films Prepared by Liquid Source Metalorganic Chemical Vapor Deposition Using Ru(EtCp)_2 with Tetrahydrofuran Solvent
• Universal thermal activation process and current induced degradation on dielectric breakdown in HfSiO(N)
• Special Section on High-κ Gate Dielectrics
• Electrical Characterization of Aluminum-Oxynitride Stacked Gate Dielectrics Prepared by a Layer-by-Layer Process of Chemical Vapor Deposition and Rapid Thermal Nitridation(Si Devices and Processes, Fundamental and Application of Advanced
• Performance and Reliability Improvement by Optimized Nitrogen Content of TaSiNx Metal Gate in Metal/HfSiON nFETs
• Area Selective Flash Lamp Post-Deposition Annealing of High-k Film Using Si Photo Absorber for Metal Gate MISFETs with NiSi Source/Drain
• Study of a Negative Threshold Voltage Shift in Positive Bias Temperature Instability and a Positive Threshold Voltage Shift the Negative Bias Temperature Instability of Yttrium-Doped HfO2 Gate Dielectrics
• Impact of Activation Annealing Temperature on the Performance, Negative Bias Temperature Instability, and Time-to-Dielectric Breakdown Lifetime of High-$k$/Metal Gate Stack p-Type Metal–Oxide–Semiconductor Field Effect Transistors
• Improvement of Device Characteristics for TiN Gate p-Type Metal–Insulator–Semiconductor Field-Effect Transistor with Al2O3-Capped HfO2 Dielectrics by Controlling Al2O3 Diffusion Annealing Process
• Vestiges of Multiple Progressive Dielectric Breakdown on HfSiON Surfaces
• Dual-Metal Gate Technology with Metal-Inserted Full Silicide Stack and Ni-Rich Full Silicide Gate Electrodes Using a Single Ni-Rich Full Silicide Phase for Scaled High-$k$ Complementary Metal–Oxide–Semiconductor Field-Effect Transistors
• Etch Profile Control of W/TiN/HfSiON and W/TaSiN/HfSiON Full-Metal Gates
• Suppression of Metamorphoses of Metal/High-$k$ Gate Stack by Low-Temperature, Cl-Free SiN Offset Spacer, and Its Impact on Scaled Metal–Oxide–Semiconductor Field-Effect Transistors
• Impact of Annealing Ambience on Resistive Switching on Pt/TiO_2/Pt Structure
• Characterization of Mg Diffusion into HfO_2/SiO_2/Si(100) Stacked Structures and Its Impact on Detect State Densities
• Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor
• Hole Mobility Enhancement Caused by Gate-Induced Vertical Strain in Gate-First Full-Metal High-$k$ P-Channel Field Effect Transistors Using Ion-Beam W
• Hafnium 4f Core-level Shifts Caused by Nitrogen Incorporation in Hf-based High-$k$ Gate Dielectrics
• Characterization of Metal/High-$k$ Structures Using Monoenergetic Positron Beams
• Characterization of Resistance-Switching of Si Oxide Dielectrics Prepared by RF Sputtering
• Guiding Principle of Energy Level Controllability of Silicon Dangling Bonds in HfSiON
• Cathode Electron Injection Breakdown Model and Time Dependent Dielectric Breakdown Lifetime Prediction in High-$k$/Metal Gate Stack p-Type Metal–Oxide–Silicon Field Effect Transistors
• Impact of High Temperature Annealing on Traps in Physical-Vapor-Deposited-TiN/SiO2/Si Analyzed by Positron Annihilation
• Origin of the Hole Current in n-type High-$k$/Metal Gate Stacks Field Effect Transistor in an Inversion State
• Trap-Related Carrier Transports in p-Channel Field-Effect Transistor with Polycrystalline Si/HSiON Gate Stack
• Comprehensive Analysis of Positive and Negative Bias Temperature Instabilities in High-$k$/Metal Gate Stack Metal–Oxide–Silicon Field Effect Transistors with Equivalent Oxide Thickness Scaling to Sub-1 nm
• Homogeneity Improvements in the Dielectric Characteristics of HfSiON Films by Nitridation
• Roughness Increase on Surface and Interface of SiO2 Grown on Atomically Flat Si(111) Terrace
• Modified Oxygen Vacancy Induced Fermi Level Pinning Model Extendable to P-Metal Pinning
• Thermal Degradation of HfSiON Dielectrics Caused by TiN Gate Electrodes and Its Impact on Electrical Properties
• Universal Correlation between Flatband Voltage and Electron Mobility in TiN/HfSiON Devices with MgO or La2O3 Incorporation and Stack Variation
• Performance and Reliability Improvement by Optimizing the Nitrogen Content of the TaSiNx Metal Gate in Metal/HfSiON n-Type Field-Effect Transistors
• Impact on Performance, Positive Bias Temperature Instability, and Time-Dependent Dielectric Dreakdown of n-Type Field Effect Transistors Incorporating Mg into HfSiON Gate Dielectrics
• Thermally Unstable Ruthenium Oxide Gate Electrodes in Metal/High-$k$ Gate Stacks
• Fabrication of High-Mobility Nitrided Hafnium Silicate Gate Dielectrics with Sub-1-nm Equivalent Oxide Thickness Using Plasma Nitridation and High-Temperature Postnitridation Annealing
• Impact of Gate Metal-Induced Stress on Performance Modulation in Gate-Last Metal–Oxide–Semiconductor Field-Effect Transistors

もっと見る 閉じる

スポンサーリンク