Suppression of Metamorphoses of Metal/High-$k$ Gate Stack by Low-Temperature, Cl-Free SiN Offset Spacer, and Its Impact on Scaled Metal–Oxide–Semiconductor Field-Effect Transistors
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概要
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Three SiN offset spacers were compared regarding the suppression of the gate-edge metamorphoses (GEMs) of scaled TaSiN/HfSiON n-type metal–oxide–semicondutor field-effect-transistors. The offset-spacer-induced GEM appears only in short-channel devices as a high threshold voltage ($V_{\text{th}}$) and a parasitic resistance. On the basis of the device characteristics, the origin of GEMs was hypothesized to be the negative fixed charge in HfSiON on the gate edges. The low-temperature, Cl-free SiN offset spacer is promising for use in scaled metal/high-$k$ devices because it provides the lowest $V_{\text{th}}$ and the highest drivability, particularly in short-channel devices, by suppressing GEMs.
- 2008-04-25
著者
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Watanabe Toshinari
Semiconductor Leading Edge Technol. Inc. Ibaraki Jpn
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Eimori Takahisa
Semiconductor Leading Edge Technologies Inc.
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Matsuki Takeo
Semiconductor Leading Edge Technologies Inc. (selete)
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Nara Yasuo
Semiconductor Leading Edge Technologies Inc.
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Mise Nobuyuki
Semiconductor Leading Edge Technologies, Inc., 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan
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Morooka Tetsu
Semiconductor Leading Edge Technologies, Inc., 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan
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Watanabe Toshinari
Semiconductor Leading Edge Technologies, Inc., 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan
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