Impact of high temperature annealing on traps in physical-vapor-deposited-TiN/SiO2/Si analyzed by positron annihilation

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概要

• 論文の詳細を見る
• Japan Society of Applied Physicsの論文

著者

• Watanabe Toshinari

  Semiconductor Leading Edge Technol. Inc. Ibaraki Jpn

関連論文

• Impact of high temperature annealing on traps in physical-vapor-deposited-TiN/SiO2/Si analyzed by positron annihilation
• Suppression of Metamorphoses of Metal/High-$k$ Gate Stack by Low-Temperature, Cl-Free SiN Offset Spacer, and Its Impact on Scaled Metal–Oxide–Semiconductor Field-Effect Transistors
• Impact of High Temperature Annealing on Traps in Physical-Vapor-Deposited-TiN/SiO2/Si Analyzed by Positron Annihilation

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