High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques
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概要
- 論文の詳細を見る
We propose a high-speed SOI bipolar transistor fabricated using bonding and thinning techniques. It is important to replace SOI area except for devices with thick SiO_2 to reduce parasitic capacitance. A thin SOI film with a thin buried layer helps meet this requirement. We formed a 1-μm-thick SOI film with a 0.7-μm-thick buried layer by ion implantation before wafer bonding pulse-field-assisted bonding and selective polishing. Devices were completely isolated by thick SiO_2 using a thin SOI film and the LOCOS process. We fabricated epitaxial base transistors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.
- 社団法人電子情報通信学会の論文
- 1993-04-25
著者
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Kojima Miki
Eda Application Engineering Worldwide Development Application Specific Products Tsukuba Technology C
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Higaki Naoshi
Fujitsu Laboratories Ltd.
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ITO Takashi
Fujitsu Laboratories Ltd.
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SUGII Toshihiro
FUJITSU LABORATORIES LTD.
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ARIMOTO Yoshihiro
Fujitsu Laboratories Ltd.
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Yamazaki Tatsuya
FUJITSU LABORATORIES LTD.
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Fukano Tetsu
FUJITSU LABORATORIES LTD.
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KOJIMA Manabu
Fujitsu Laboratories Ltd.
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Sugii T
Fujitsr Ltd. Akiruno-shi Jpn
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ARIMOTO Yoshihiro
System LSI Development Labs., FUJITSU LABORATORIES LTD.
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Yamazaki T
Atr Adaptive Communications Research Laboratories:(present Address)communications Research Laborator
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Fukuroda Atsushi
FUJITSU LABORATORIES LTD.
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Ito T
Department Of Chemical Engineering Graduate School Of Engineering Nagoya University
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Arimoto Y
System Lsi Development Labs. Fujitsu Laboratories Ltd.
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