A 100 MIPS High Speed and Low Power Digital Signal Processor (Special Issue on Low-Power and High-Speed LSI Technologies)
スポンサーリンク
概要
- 論文の詳細を見る
A 100 MIPS high speed and low power fixed point Digital Signal Processor (DSP) has been developed applying 0.45 μm CMOS TLM technology. The DSP contains a 16-bit×32K full CMOS static RAM with a hierarchical low power architecture. The device is a RAM based DSP with a total of 4.2 million transistors and a new low power design and process which enabled an approximate 50% reduction in power as compared to conventional DSPs at 40 MHz. In order to cover very wide application requirements, this DSP is capable of operating at 1.0 V [1] for DSP core and 3.3 V for I/O. This was achieved by new level shifter circuitry to interface with cost effective 3 V external commodity products and confirmed 80% of power reduction at Core V_<DD>=2.0 V, I/0 V_<DD>=3.3 V at 40 MHz. This paper describes the new features of the high speed and low power DSP.
- 社団法人電子情報通信学会の論文
- 1997-12-25
著者
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Ego Emmanuel
Texas Instruments Inc., Nice, France
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Ego Emmanuel
Texas Instruments France
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TAKAHASHI Hiroshi
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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ABIKO Shigeshi
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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MIZUSHIMA Shintaro
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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OZAWA Yuji
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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TASHIRO Kenichi
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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MURAMATSU Shigetoshi
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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FUSUMADA Masahiro
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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TODOROKI Akemi
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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TANAKA Youichi
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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ITOIGAWA Masayasu
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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MORIOKA Isao
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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MIZUNO Hiroyuki
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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KOJIMA Miki
ASP Department, DSP Development, Texas Instruments Japan limited Tokyo
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NASO Giovanni
Texas Instruments Italy
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CHIRAT Frank
Texas Instruments France
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Ozawa Yuji
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Morioka Isao
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Fusumada Masahiro
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Abiko Shigeshi
Dsp Development Japan Worldwide Development Application Specific Products Tsukuba Technology Center
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Tashiro Kenichi
Dsp Development Japan Worldwide Development Application Specific Products Tsukuba Technology Center
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Muramatsu Shigetoshi
Dsp Development Japan Worldwide Development Application Specific Products Tsukuba Technology Center
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Kojima Miki
Eda Application Engineering Worldwide Development Application Specific Products Tsukuba Technology C
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Mizushima S
Texas Instruments Japan Ltd. Tokyo Jpn
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Itoigawa Masayasu
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Todoroki Akemi
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Abiko S
Texas Instruments Japan Ltd. Tsukuba‐shi Jpn
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Tanaka Youichi
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Takahasi Hiroshi
The Authors Are With Application Specific Products Worldwide Development Dsp Development Japan Tsuku
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Mizushima Shintaro
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Mizuno Hiroyuki
Asp Department Dsp Development Texas Instruments Japan Limited Tokyo
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Takahashi H
Graduate School Of Science And Engineering Ehime University
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