Highly Reliable Dynamic Random Access Memory Technology for Application Specific Memory with Dual Nitrogen Concentration Gate Oxynitrides Using Selective Nitrogen Implantation
スポンサーリンク
概要
- 論文の詳細を見る
A polymetal dual gate dynamic random access memory (DRAM) for application specific memory (ASM) with dual nitrogen concentrated oxynitrides was developed for the first time. This technology uses selective nitrogen implantation performed just after gate oxidation. The nitrogen concentration of p-type metal oxide semiconductor (PMOS) in gate dielectric combined with nitrogen implantation and NO (nitric oxide) annealing is sufficiently high to suppress boron penetration, whereas that of the cell array transistor (cell-Tr) and n-type metal oxide semiconductor (NMOS) is sufficiently low to maintain the threshold voltage ($V_{\text{th}}$) without increasing the channel dosage by using only NO annealing.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2003-04-15
著者
-
Katsumata Ryota
Toshiba Corporation
-
Nara Yasuo
Fujitsu Laboratories Ltd.
-
SUGIZAKI Taro
FUJITSU LABORATOIRES Ltd.
-
NAKANISHI Toshiro
FUJITSU LABORATOIRES Ltd.
-
TANAKA Tetsu
Fujitsu Laboratories Ltd.
-
KOJIMA Manabu
Fujitsu Laboratories Ltd.
-
MURAKOSHI Atsushi
Toshiba Corporation
-
Katsumata Ryota
Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
-
Tanaka Tetsu
Fujitsu Laboratories Ltd., 10-1 Morinosato-Wakamiya, Atsugi 243-0197, Japan
-
Nara Yasuo
Fujitsu Laboratories Ltd., 10-1 Morinosato-Wakamiya, Atsugi 243-0197, Japan
関連論文
- Fabrication and Delay Time Analysis of Deep Submicron CMOS Devices
- Ti Salicide Process for Subquarter-Micron CMOS Devices (Special Issue on Quarter Micron Si Device and Process Technologies)
- Wafer Cleaning with Photoexcited Chlorine and Thermal Treatment for High-Quality silicon Epitaxy : Beam Induced Physics and Chemistry
- Ultra High Density HfO2-Nanodot Memory for Flash Memory Scaling
- Advanced SOI Devices Using CMP and Wafer Bonding
- Coulomb Interaction Effect Correction in Electron-Beam Block Exposure Lithography
- Quantum-Size Effect from Photoluminescence of Low-Temperature-Oxidized Porous Si
- High-Density Layer at the SiO_2/Si Interface Observed by Difference X-Ray Reflectivity
- High-Accuracy X-ray Reflectivity Study of Native Oxide Formed in Chemical Treatment
- Synchrotron-Radiation-Induced Modification of Silicon Dioxide Film at Room Temperature : Beam Induced Physics and Chemistry
- Synchrotron-Radiation-Induced Modification of Silicon Dioxide Film at Room Temperature
- Synchrotron Radiation-Assisted Removal of Oxygen and Carbon Contaminants from a Silicon Surface
- Scenario of Source/Drain Extension and Halo Engineering for High Performance 50nm SOI-pMOSFET
- High-Speed and Low-Power n^+-p^+ Double-Gate SOI CMOS
- Dual-Thickness Gate Oxidation Technology with Halogen/Xenon Implantation for Embedded Dynamic Random Access Memories
- Dual-Thickness Gate Oxidation Technology with Halogen/Xenon Implantation for Embedded DRAMs
- Device Design of Direct Tunneling Memory (DTM) Using Technology Computer Aided Design (TCAD) for Low-Power RAM Applications
- Improvement in Retention/Program Time Ratio of Direct Tunneling Memory (DTM) for Low Power SoC Applications(Memory, Low-Power LSI and Low-Power IP)
- Electrical Characteristics of Silicon Devices after UV-Excited Dry Cleaning (Special Issue on Opto-Electronics and LSI)
- Advanced Input/Output Technology Using Laterally Modulated Channel Metal–Oxide–Semiconductor Field Effect Transistor for 65-nm Node System on a Chip
- High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques
- Suppression of Hot Carrier Degradation in LDD n-MOSFETs with Gate N_2O-Nitrided O_3-Oxide
- Evaluation of Photoemitted Current from SiO_2 Film on Silicon During Synchrotron Radiation Irradiation
- Chemical Structures of Native Oxides Formed during Wet Chemical Treatments
- Synchrotron Radiation-Assisted Silicon Film Growth by Irradiation Parallel to the Substrate
- Analytical Models for Symmetric Thin-Film Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor-Field-Effect-Transistors
- High Frequency Characteristics of Dynamic Threshold-Voltage MOSFET (DTMOS) under Ultra-Low Supply Voltage (Special Issue on Ultra-High-Speed IC and LSI Technology)
- A New SOI-Lateral Bipolar Transistor for High-Speed Operation
- Identification of MOS Gate Dielectric-Breakdown Spot Using High-Selectivity Etching
- Evaluation of Shot Position Error in Electron Beam Lithography Using Overlay Metrology with 'One-Shot' Inspection Mark
- Impact Ionization in 0.1 μm Metal-Oxide-Semiconductor Field-Effect Transistors
- New Method of Extracting Inversion Layer Thickness and Charge Profile and Its Impact on Scaled MOSFETs
- Trap Assisted Leakage Mechanism of 'worst' Junction in Giga-bit DRAM Using Negative Word-Line Voltage
- Ultraclean Technique for Silicon Wafer Surfaces with HNO_3-HF Systems : Materials and Device Structures with Atomic Scale Resolution(Solid State Devices and Materials 1)
- Impact of Metal Gate/High-k Interface in Mo Metal Gated MOSFETs with HfO_2 Gate Dielectrics
- Instability of SiO_2 Film Caused by Fluorine and Chlorine Inclusion
- Low Contact Resistance Poly-Metal Gate CMOS Using TiN/Thin TiSi_2/Poly-Si Structure
- Low-Contact Resistance Poly-Metal Gate Electrode Using TiN/Thin TiSi_2/Poly-Si Structure
- Process Integration Issues on Mo-Metal-Gated MOSFETs with HfO2 High-k Gate Dielectrics
- Device Design of Direct Tunneling Memory (DTM) Using Technology Computer Aided Design (TCAD) for Low-Power RAM Applications
- Highly Reliable Dynamic Random Access Memory Technology for Application Specific Memory with Dual Nitrogen Concentration Gate Oxynitrides Using Selective Nitrogen Implantation
- Dual-Thickness Gate Oxidation Technology with Halogen/Xenon Implantation for Embedded Dynamic Random Access Memories
- Ultrahigh-Density HfO2 Nanodots for Flash Memory Scaling
- Wafer Cleaning with Photoexcited Chlorine and Thermal Treatment for High-Quality Silicon Epitaxy