Extended Word-Line NAND Flash Memory
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概要
- 論文の詳細を見る
A NAND flash memory array having extended word-lines is proposed. Without scarifying areal density, both physical gate length and charge storage node size are increased through the word-line extension process. Simple fabrication flow is delivered and device performances in a viewpoint of the short channel effect are simulated. The effect of gate length variation on the cell threshold voltage ($V_{\text{TH}}$) distribution is addressed. Programming characteristics in the inversion-type source/drain NAND flash memory are also described. Some side effects concerned with the program disturbance and cell-to-cell interference are investigated in comparison with the conventional NAND flash memory.
- 2009-08-25
著者
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Kim Wandong
Inter-university Semiconductor Research Center
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Yun Jang-gn
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Compu
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Park Il
Inter-university Semiconductor Research Center And School Of Electrical Engineering And Computer Sci
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Lee Jong
Inter-univ. Semicon. Res. Center Seoul Nat. Univ.
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Kim Wandong
Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Park Byung-Gook
Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Park Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Park Il
Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Park Il
Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Lee Jong
Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Park Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea
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