Simulation of Retention Characteristics in Double-Gate Structure Multi-bit SONOS Flash Memory(Session4A: Nonvolatile Memory)
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概要
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This paper presents a detailed study of the retention characteristics in scaled multi-bit SONOS flash memories. By calculating the oxide field and tunneling currents, we evaluate the charge trapping mechanism. We calculate transient retention dynamics with the ONO fields, trapped charge, and tunneling currents. All the parameters were obtained by physics-based equations and without any fitting parameters or optimization steps. The results can be used with nanoscale nonvolatile memory. This modeling accounts for the V_T shift as a function of trapped charge, time, and thickness of silicon oxide and silicon nitride layers, and can be used for optimizing the ONO geometry and parameters for maximum performance.
- 社団法人電子情報通信学会の論文
- 2008-07-02
著者
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PARK Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu
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Park Byung‐gook
School Of Electrical Engineering Seoul National University
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Park Byung-gook
School Of Electrical Engineering Seoul National University
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Park Il
Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National
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Park Il
Inter-university Semiconductor Research Center Seoul National University:school Of Electrical Engine
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Kim Doo-Hyun
Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Sci
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Kim Doo‐hyun
Inter-university Semiconductor Research Center And School Of Electrical Engineering And Computer Sci
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Park Il
Inter-university Semiconductor Research Center And School Of Electrical Engineering And Computer Sci
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Kim Doo-Hyun
Inter-university Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea
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Park Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Park Il
Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Park Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea
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