Design and Simulation of Self-Aligned Vertical Island Single Electron Transistor (VI-SET) with Electrical Tunneling Barrier

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概要

• 論文の詳細を見る

• Single electron transistors (SETs) are lively searched as a promising device beyond the scaling limits of CMOS (Complementary Metal Oxide Semiconductor) devices. Among the various SETs that have been reported, the vertical island (VI) SET uses a fabrication process which is compatible with CMOS and has the advantage of effectively controlling the device characteristics with its device parameters. Device simulation is performed to optimize the device parameters, and a structure that may operate the presentation of various function in the circuit and device. VI-SET device will be using the multi function circuit and qubit through the double quantum dot in the devices.

• 社団法人電子情報通信学会の論文
• 2009-06-17

著者

• KANG Kwon-Chil

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu

• LEE Joung-Eob

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu

• LEE Jung

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu

• PARK Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu

• Park Byung‐gook

  School Of Electrical Engineering Seoul National University

• Park Byung-gook

  School Of Electrical Engineering Seoul National University

• Park Byung‐gook

  Seoul National Univ. Seoul Kor

• Lee J

  School Of Electrical Engineering Seoul National University

• Park B‐g

  Inter-university Semiconductor Research Center And School Of Electrical Engineering And Computer Sci

• Lee J

  Inter-university Semiconductor Research Center And School Of Electrical Engineering And Computer Sci

• Lee Joung-eob

  Inter-university Semiconductor Research Center And School Of Electrical Engineering And Computer Sci

• Kang Kwon-chil

  Inter-university Semiconductor Research Center (isrc):school Of Electrical Engineering And Computer

• Lee Jong

  Inter-university Semiconductor Research Center And School Of Electrical Engineering Seoul National U

• Park Byung-gook

  Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering Seoul Nat

• Lee Jong

  Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering Seoul Nat

• Lee Jong

  Inter-university Semiconductor Research Center School Of Electrical Engineering Seoul Nat'l Uni

• Park Byung-gook

  Inter-university Semiconductor Research Center And School Of Electrical Engineering Seoul National U

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea

• Lee Jung

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

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