Extraction of Interface-States Energy Distribution in Nitrided and Pure Gate Dielectrics for Metal Oxide Semiconductor Field Effect Transistor Applications

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概要

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• The interface states have been one of the main reliability concerns for nano-scale metal oxide semiconductor field effect transistors (MOSFETs). Especially, the stress induced interface states generation is very important. For quantitatively clarify, the high-frequency charge pumping technique is presented and it has better accuracy and easier than former charge pumping method, which needs variable rise and fall times of gate pulse. Furthermore, it can reject border traps effect. Using the presented method, the energy distribution of interface states was extracted and the Fowler–Nordheim stress induced energy level of interface states was profiled in pure silicon dioxide and finely engineered remote plasma nitrided oxide. The technique is well suited for investigating the nano-scale MOSFET reliabilities.

• 2009-05-25

著者

• PARK Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu

• LEE Jong-Duk

  Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Sci

• Shin Hyungcheol

  Inter-university Semiconductor Research Center (isrc)

• Kim Bong

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University, #059, 599 Gwanangno, Gwanak-gu, Seoul 151-744, Korea

• Shin Hyungcheol

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University, #059, 599 Gwanangno, Gwanak-gu, Seoul 151-744, Korea

• Yang Seungwon

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University, #059, 599 Gwanangno, Gwanak-gu, Seoul 151-744, Korea

• Son Younghwan

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University, #059, 599 Gwanangno, Gwanak-gu, Seoul 151-744, Korea

• Kim Jinho

  Technology Development Team 2, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-dong, Giheung-gu, Yongin, Gyeonggi-do 449-711, Korea

• Moon Chang-Rok

  Technology Development Team 2, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-dong, Giheung-gu, Yongin, Gyeonggi-do 449-711, Korea

• Lee Duckhyung

  Technology Development Team 2, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-dong, Giheung-gu, Yongin, Gyeonggi-do 449-711, Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University, #059, 599 Gwanangno, Gwanak-gu, Seoul 151-744, Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea

• Lee Jong-Duk

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University, #059, 599 Gwanangno, Gwanak-gu, Seoul 151-744, Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

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