Fin and Recess-Channel Metal Oxide Semiconductor Field Effect Transistor for Sub-50 nm Dynamic Random Access Memory Cell
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概要
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In this paper, we propose a novel fin and recess-channel metal oxide semiconductor field effect transistor (MOSFET) for sub-50 nm dynamic random access memory (DRAM) cell application. Also, it is compared with the recess-channel-array transistor (RCAT). In the proposed device, a silicon fin region is added to the recessed channel MOSFET. Thanks to the additional current path through the silicon fin with the wide source/drain width, the FiReFET shows excellent current drivability. To reduce gate-induced drain leakage (GIDL) current, we adopt an underlapped device structure. As a result, it is found that the optimized underlap structure helps to prevent the OFF state leakage current induced by the increase of the gate work function.
- 2010-10-25
著者
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PARK Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu
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Song Jae
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering Seoul Nat
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Yun Jang-gn
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Compu
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Shin Hyungcheol
Inter-university Semiconductor Research Center (isrc)
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Kim Sang
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Compu
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Sun Min-chul
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University
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Ryoo Kyung-chang
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University
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Oh Jeong-hoon
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University
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Kim Garam
Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University
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Kim Jong
Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Kim Sang
Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Korea
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Song Jae
Inter-University Semiconductor Research Center (ISRC)
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Song Jae
Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Korea
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Park Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea
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Yun Jang-Gn
Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Korea
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Sun Min-Chul
Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Korea
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Sun Min-Chul
Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science (EECS), Seoul National University, Seoul 151-742, Korea
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Kim Garam
Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Korea
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Kim Garam
Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea
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Park Byung-Gook
Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea
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