Sun Min-Chul | Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science (EECS), Seoul National University, Seoul 151-742, Korea

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著作論文

Fin and Recess-Channel Metal Oxide Semiconductor Field Effect Transistor for Sub-50 nm Dynamic Random Access Memory Cell
Study on Threshold Voltage Control of Tunnel Field-Effect Transistors Using VT-Control Doping Region
Design Guideline of Si-Based L-Shaped Tunneling Field-Effect Transistors
Comparative Study on Top- and Bottom-Source Vertical-Channel Tunnel Field-Effect Transistors
Study on Threshold Voltage Control of Tunnel Field-Effect Transistors Using V_T-Control Doping Region
Design of Thin-Body Double-Gated Vertical-Channel Tunneling Field-Effect Transistors for Ultralow-Power Logic Circuits
L-Shaped Tunneling Field-Effect Transistors for Complementary Logic Applications
Complementary-Metal--Oxide--Semiconductor Technology-Compatible Tunneling Field-Effect Transistors with 14 nm Gate, Sigma-Shape Source, and Recessed Channel

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