Kim Garam | Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University

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著作論文

Fin and Recess-Channel Metal Oxide Semiconductor Field Effect Transistor for Sub-50 nm Dynamic Random Access Memory Cell
Room-Temperature Operation of a Single-Electron Transistor Made by Oxidation Process Using the Recessed Channel Structure
Dual Gate Single-Electron Transistors with a Recessed Channel and Underlapped Source/Drain Structure
Comparative Study on Top- and Bottom-Source Vertical-Channel Tunnel Field-Effect Transistors
Study on Threshold Voltage Control of Tunnel Field-Effect Transistors Using V_T-Control Doping Region
Design of Thin-Body Double-Gated Vertical-Channel Tunneling Field-Effect Transistors for Ultralow-Power Logic Circuits

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